Attention is currently required from: Varshit B Pandya, Maulik V Vaghela, Sridhar Siricilla, Patrick Rudolph.

Maulik V Vaghela uploaded patch set #23 to this change.

View Change

soc/intel/alderlake: Add LPC and IGD device Ids for Alderlake M

Added new LPC and IGD device IDs for Alderlake M.
Also added entry for CPUID_ALDERLAKE_M_A0 in report_platform.c

BUG=None
BRANCH=None
TEST=check if platform information print is coming properly in coreboot

Change-Id: If33c43da8cbd786261b00742e342f0f01622c607
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
---
M src/include/device/pci_ids.h
M src/soc/intel/alderlake/bootblock/report_platform.c
M src/soc/intel/common/block/graphics/graphics.c
M src/soc/intel/common/block/lpc/lpc.c
4 files changed, 7 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/50138/23

To view, visit change 50138. To unsubscribe, or for help writing mail filters, visit settings.