Nico Huber submitted this change.
mb/x/acpi_tables: Move EC_RW detection
These boards without ChromeEC do not set ACTIVE_EC_RW
flag as part of the gnvs_assign_chromeos() function.
Create abstraction to avoid <vendorcode/chromeos/x> include.
Change-Id: Ic6029e1807fcfe7dd2c766ce8221e347b6b096f9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48777
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/acpi/chromeos-gnvs.c
M src/include/acpi/acpi_gnvs.h
M src/mainboard/google/beltino/acpi_tables.c
M src/mainboard/google/butterfly/acpi_tables.c
M src/mainboard/google/parrot/acpi_tables.c
M src/mainboard/google/stout/acpi_tables.c
M src/mainboard/intel/baskingridge/acpi_tables.c
M src/mainboard/intel/emeraldlake2/acpi_tables.c
M src/mainboard/samsung/lumpy/acpi_tables.c
M src/mainboard/samsung/stumpy/acpi_tables.c
10 files changed, 18 insertions(+), 38 deletions(-)
diff --git a/src/acpi/chromeos-gnvs.c b/src/acpi/chromeos-gnvs.c
index b1588fa..8d96769 100644
--- a/src/acpi/chromeos-gnvs.c
+++ b/src/acpi/chromeos-gnvs.c
@@ -18,3 +18,12 @@
if (CONFIG(EC_GOOGLE_CHROMEEC) && !google_ec_running_ro())
gnvs_chromeos->vbt2 = ACTIVE_ECFW_RW;
}
+
+void gnvs_set_ecfw_rw(void)
+{
+ chromeos_acpi_t *gnvs_chromeos = gnvs_chromeos_ptr(acpi_get_gnvs());
+ if (!gnvs_chromeos)
+ return;
+
+ gnvs_chromeos->vbt2 = ACTIVE_ECFW_RW;
+}
diff --git a/src/include/acpi/acpi_gnvs.h b/src/include/acpi/acpi_gnvs.h
index 1da6fd4..9953e6a 100644
--- a/src/include/acpi/acpi_gnvs.h
+++ b/src/include/acpi/acpi_gnvs.h
@@ -10,6 +10,7 @@
void acpi_inject_nvsa(void);
void gnvs_assign_chromeos(void);
+void gnvs_set_ecfw_rw(void);
/* Platform code must implement these. */
struct global_nvs;
diff --git a/src/mainboard/google/beltino/acpi_tables.c b/src/mainboard/google/beltino/acpi_tables.c
index 9756695..9d1f4dd 100644
--- a/src/mainboard/google/beltino/acpi_tables.c
+++ b/src/mainboard/google/beltino/acpi_tables.c
@@ -3,10 +3,8 @@
#include <acpi/acpi.h>
#include <acpi/acpi_gnvs.h>
#include <device/device.h>
-#include <ec/google/chromeec/ec.h>
#include <southbridge/intel/lynxpoint/nvs.h>
#include <southbridge/intel/lynxpoint/pch.h>
-#include <vendorcode/google/chromeos/gnvs.h>
#include <variant/thermal.h>
void acpi_create_gnvs(struct global_nvs *gnvs)
@@ -22,11 +20,6 @@
/* TPM Present */
gnvs->tpmp = 1;
-#if CONFIG(CHROMEOS)
- // SuperIO is always RO
- gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO;
-#endif
-
gnvs->f4of = FAN4_THRESHOLD_OFF;
gnvs->f4on = FAN4_THRESHOLD_ON;
gnvs->f4pw = FAN4_PWM;
diff --git a/src/mainboard/google/butterfly/acpi_tables.c b/src/mainboard/google/butterfly/acpi_tables.c
index 315fd6d..5b27455 100644
--- a/src/mainboard/google/butterfly/acpi_tables.c
+++ b/src/mainboard/google/butterfly/acpi_tables.c
@@ -2,7 +2,6 @@
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
-#include <vendorcode/google/chromeos/gnvs.h>
#include "thermal.h"
void acpi_create_gnvs(struct global_nvs *gnvs)
@@ -19,7 +18,8 @@
// The firmware read/write status is a "virtual" switch and
// will be handled elsewhere. Until then hard-code to
// read/write instead of read-only for developer mode.
- gnvs->chromeos.vbt2 = ACTIVE_ECFW_RW;
+ if (CONFIG(CHROMEOS))
+ gnvs_set_ecfw_rw();
// the lid is open by default.
gnvs->lids = 1;
@@ -27,5 +27,4 @@
/* EC handles all thermal and fan control on Butterfly. */
gnvs->tcrt = CRITICAL_TEMPERATURE;
gnvs->tpsv = PASSIVE_TEMPERATURE;
-
}
diff --git a/src/mainboard/google/parrot/acpi_tables.c b/src/mainboard/google/parrot/acpi_tables.c
index 62e52c4..4e5d781 100644
--- a/src/mainboard/google/parrot/acpi_tables.c
+++ b/src/mainboard/google/parrot/acpi_tables.c
@@ -3,7 +3,6 @@
#include <acpi/acpi.h>
#include <acpi/acpi_gnvs.h>
#include <device/device.h>
-#include <vendorcode/google/chromeos/gnvs.h>
#include <ec/compal/ene932/ec.h>
#include "ec.h"
@@ -22,10 +21,8 @@
gnvs->s5u0 = 0;
gnvs->s5u1 = 0;
-#if CONFIG(CHROMEOS)
- gnvs->chromeos.vbt2 = parrot_ec_running_ro() ?
- ACTIVE_ECFW_RO : ACTIVE_ECFW_RW;
-#endif
+ if (CONFIG(CHROMEOS) && !parrot_ec_running_ro())
+ gnvs_set_ecfw_rw();
/* EC handles all active thermal and fan control on Parrot. */
gnvs->tcrt = CRITICAL_TEMPERATURE;
diff --git a/src/mainboard/google/stout/acpi_tables.c b/src/mainboard/google/stout/acpi_tables.c
index f994e57..545b239 100644
--- a/src/mainboard/google/stout/acpi_tables.c
+++ b/src/mainboard/google/stout/acpi_tables.c
@@ -3,7 +3,6 @@
#include <acpi/acpi.h>
#include <acpi/acpi_gnvs.h>
#include <device/device.h>
-#include <vendorcode/google/chromeos/gnvs.h>
#include <bootmode.h>
#include <ec/quanta/it8518/ec.h>
#include "ec.h"
@@ -23,10 +22,8 @@
gnvs->s5u0 = 0;
gnvs->s5u1 = 0;
-#if CONFIG(CHROMEOS)
- gnvs->chromeos.vbt2 = get_recovery_mode_switch() ?
- ACTIVE_ECFW_RO : ACTIVE_ECFW_RW;
-#endif
+ if (CONFIG(CHROMEOS) && !get_recovery_mode_switch())
+ gnvs_set_ecfw_rw();
/* EC handles all thermal and fan control on Stout. */
gnvs->tcrt = CRITICAL_TEMPERATURE;
diff --git a/src/mainboard/intel/baskingridge/acpi_tables.c b/src/mainboard/intel/baskingridge/acpi_tables.c
index c0c488a..1d915a1 100644
--- a/src/mainboard/intel/baskingridge/acpi_tables.c
+++ b/src/mainboard/intel/baskingridge/acpi_tables.c
@@ -3,7 +3,6 @@
#include <acpi/acpi.h>
#include <acpi/acpi_gnvs.h>
#include <device/device.h>
-#include <vendorcode/google/chromeos/gnvs.h>
#include <southbridge/intel/lynxpoint/pch.h>
#include <southbridge/intel/lynxpoint/nvs.h>
@@ -25,11 +24,6 @@
/* TPM Present */
gnvs->tpmp = 1;
-#if CONFIG(CHROMEOS)
- /* Emerald Lake has no EC (?) */
- gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO;
-#endif
-
gnvs->f4of = FAN4_THRESHOLD_OFF;
gnvs->f4on = FAN4_THRESHOLD_ON;
gnvs->f4pw = FAN4_PWM;
diff --git a/src/mainboard/intel/emeraldlake2/acpi_tables.c b/src/mainboard/intel/emeraldlake2/acpi_tables.c
index 302966a..d133249 100644
--- a/src/mainboard/intel/emeraldlake2/acpi_tables.c
+++ b/src/mainboard/intel/emeraldlake2/acpi_tables.c
@@ -3,7 +3,6 @@
#include <acpi/acpi.h>
#include <acpi/acpi_gnvs.h>
#include <device/device.h>
-#include <vendorcode/google/chromeos/gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include "thermal.h"
@@ -44,7 +43,4 @@
gnvs->tcrt = CRITICAL_TEMPERATURE;
gnvs->tpsv = PASSIVE_TEMPERATURE;
gnvs->tmax = MAX_TEMPERATURE;
-
- // Stumpy has no arms^H^H^H^HEC.
- gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO;
}
diff --git a/src/mainboard/samsung/lumpy/acpi_tables.c b/src/mainboard/samsung/lumpy/acpi_tables.c
index 1a3317d..c7aef8f 100644
--- a/src/mainboard/samsung/lumpy/acpi_tables.c
+++ b/src/mainboard/samsung/lumpy/acpi_tables.c
@@ -4,9 +4,6 @@
#include <acpi/acpi_gnvs.h>
#include <device/device.h>
#include <ec/acpi/ec.h>
-#if CONFIG(CHROMEOS)
-#include <vendorcode/google/chromeos/gnvs.h>
-#endif
#include <southbridge/intel/bd82x6x/nvs.h>
#include "thermal.h"
@@ -47,5 +44,6 @@
gnvs->tmax = MAX_TEMPERATURE;
gnvs->flvl = 5;
- gnvs->chromeos.vbt2 = ec_read(0xcb) ? ACTIVE_ECFW_RW : ACTIVE_ECFW_RO;
+ if (CONFIG(CHROMEOS) && ec_read(0xcb))
+ gnvs_set_ecfw_rw();
}
diff --git a/src/mainboard/samsung/stumpy/acpi_tables.c b/src/mainboard/samsung/stumpy/acpi_tables.c
index b2c1fca..b046c2c 100644
--- a/src/mainboard/samsung/stumpy/acpi_tables.c
+++ b/src/mainboard/samsung/stumpy/acpi_tables.c
@@ -3,7 +3,6 @@
#include <acpi/acpi.h>
#include <acpi/acpi_gnvs.h>
#include <device/device.h>
-#include <vendorcode/google/chromeos/gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include "thermal.h"
@@ -45,7 +44,4 @@
gnvs->tpsv = PASSIVE_TEMPERATURE;
gnvs->tmax = MAX_TEMPERATURE;
gnvs->flvl = 5;
-
- // Stumpy has no arms^H^H^H^HEC.
- gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO;
}
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