Furquan Shaikh has uploaded this change for review.
soc/intel: Drop unused lpss functions
This change drops the following unused lpss functions and related
code:
* soc_lpss_controllers_list
* is_dev_lpss
These functions were added to determine if a controller is LPSS for
performing IRQ configuration. But, these never got used and hence are
being dropped.
Change-Id: I27bdfbca7c199e823a0e4fdb277e3f22fb6bae7a
Signed-off-by: Furquan Shaikh <furquan@google.com>
---
M src/soc/intel/alderlake/fsp_params.c
M src/soc/intel/cannonlake/fsp_params.c
M src/soc/intel/common/block/include/intelblocks/lpss.h
M src/soc/intel/common/block/lpss/lpss.c
M src/soc/intel/elkhartlake/fsp_params.c
M src/soc/intel/icelake/fsp_params.c
M src/soc/intel/jasperlake/fsp_params.c
M src/soc/intel/tigerlake/fsp_params.c
8 files changed, 0 insertions(+), 163 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/55226/1
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c
index 8664fe6..22329f2 100644
--- a/src/soc/intel/alderlake/fsp_params.c
+++ b/src/soc/intel/alderlake/fsp_params.c
@@ -67,22 +67,6 @@
params->SerialIoUartMode[i] = config->SerialIoUartMode[i];
}
-static const pci_devfn_t serial_io_dev[] = {
- PCH_DEVFN_I2C0,
- PCH_DEVFN_I2C1,
- PCH_DEVFN_I2C2,
- PCH_DEVFN_I2C3,
- PCH_DEVFN_I2C4,
- PCH_DEVFN_I2C5,
- PCH_DEVFN_GSPI0,
- PCH_DEVFN_GSPI1,
- PCH_DEVFN_GSPI2,
- PCH_DEVFN_GSPI3,
- PCH_DEVFN_UART0,
- PCH_DEVFN_UART1,
- PCH_DEVFN_UART2
-};
-
__weak void mainboard_update_soc_chip_config(struct soc_intel_alderlake_config *config)
{
/* Override settings per board. */
@@ -334,10 +318,3 @@
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
}
-
-/* Return list of SOC LPSS controllers */
-const pci_devfn_t *soc_lpss_controllers_list(size_t *size)
-{
- *size = ARRAY_SIZE(serial_io_dev);
- return serial_io_dev;
-}
diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index d7772f1..5ac51f0 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -19,21 +19,6 @@
#include "chip.h"
-static const pci_devfn_t serial_io_dev[] = {
- PCH_DEVFN_I2C0,
- PCH_DEVFN_I2C1,
- PCH_DEVFN_I2C2,
- PCH_DEVFN_I2C3,
- PCH_DEVFN_I2C4,
- PCH_DEVFN_I2C5,
- PCH_DEVFN_GSPI0,
- PCH_DEVFN_GSPI1,
- PCH_DEVFN_GSPI2,
- PCH_DEVFN_UART0,
- PCH_DEVFN_UART1,
- PCH_DEVFN_UART2
-};
-
/*
* Given an enum for PCH_SERIAL_IO_MODE, 1 needs to be subtracted to get the FSP
* UPD expected value for Serial IO since valid enum index starts from 1.
@@ -572,13 +557,6 @@
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
}
-/* Return list of SOC LPSS controllers */
-const pci_devfn_t *soc_lpss_controllers_list(size_t *size)
-{
- *size = ARRAY_SIZE(serial_io_dev);
- return serial_io_dev;
-}
-
/* Handle FSP logo params */
void soc_load_logo(FSPS_UPD *supd)
{
diff --git a/src/soc/intel/common/block/include/intelblocks/lpss.h b/src/soc/intel/common/block/include/intelblocks/lpss.h
index 8d22e7a..5cfd5c5 100644
--- a/src/soc/intel/common/block/include/intelblocks/lpss.h
+++ b/src/soc/intel/common/block/include/intelblocks/lpss.h
@@ -27,13 +27,4 @@
/* Set controller power state to D0 or D3*/
void lpss_set_power_state(pci_devfn_t devfn, enum lpss_pwr_state state);
-/*
- * Handler to get list of LPSS controllers. The SOC is expected to send out a
- * list of pci devfn for all LPSS controllers supported by the SOC.
- */
-const pci_devfn_t *soc_lpss_controllers_list(size_t *size);
-
-/* Check if the device is a LPSS controller */
-bool is_dev_lpss(const struct device *dev);
-
#endif /* SOC_INTEL_COMMON_BLOCK_LPSS_H */
diff --git a/src/soc/intel/common/block/lpss/lpss.c b/src/soc/intel/common/block/lpss/lpss.c
index 6e33c0f..70a5934 100644
--- a/src/soc/intel/common/block/lpss/lpss.c
+++ b/src/soc/intel/common/block/lpss/lpss.c
@@ -72,21 +72,3 @@
reg8 |= state;
pci_s_write_config8(devfn, PME_CTRL_STATUS, reg8);
}
-
-bool is_dev_lpss(const struct device *dev)
-{
- static size_t size;
- static const pci_devfn_t *lpss_devices;
-
- if (dev->path.type != DEVICE_PATH_PCI)
- return false;
-
- if (!lpss_devices)
- lpss_devices = soc_lpss_controllers_list(&size);
-
- for (int i = 0; i < size; i++) {
- if (lpss_devices[i] == dev->path.pci.devfn)
- return true;
- }
- return false;
-}
diff --git a/src/soc/intel/elkhartlake/fsp_params.c b/src/soc/intel/elkhartlake/fsp_params.c
index f02d20e..611d12b 100644
--- a/src/soc/intel/elkhartlake/fsp_params.c
+++ b/src/soc/intel/elkhartlake/fsp_params.c
@@ -41,23 +41,6 @@
return ctl - 1;
}
-static const pci_devfn_t serial_io_dev[] = {
- PCH_DEVFN_I2C0,
- PCH_DEVFN_I2C1,
- PCH_DEVFN_I2C2,
- PCH_DEVFN_I2C3,
- PCH_DEVFN_I2C4,
- PCH_DEVFN_I2C5,
- PCH_DEVFN_I2C6,
- PCH_DEVFN_I2C7,
- PCH_DEVFN_GSPI0,
- PCH_DEVFN_GSPI1,
- PCH_DEVFN_GSPI2,
- PCH_DEVFN_UART0,
- PCH_DEVFN_UART1,
- PCH_DEVFN_UART2
-};
-
static void parse_devicetree(FSP_S_CONFIG *params)
{
const struct soc_intel_elkhartlake_config *config = config_of_soc();
@@ -287,10 +270,3 @@
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
}
-
-/* Return list of SOC LPSS controllers */
-const pci_devfn_t *soc_lpss_controllers_list(size_t *size)
-{
- *size = ARRAY_SIZE(serial_io_dev);
- return serial_io_dev;
-}
diff --git a/src/soc/intel/icelake/fsp_params.c b/src/soc/intel/icelake/fsp_params.c
index 184b9d6..395bca8 100644
--- a/src/soc/intel/icelake/fsp_params.c
+++ b/src/soc/intel/icelake/fsp_params.c
@@ -33,21 +33,6 @@
params->SerialIoUartMode[i] = config->SerialIoUartMode[i];
}
-static const pci_devfn_t serial_io_dev[] = {
- PCH_DEVFN_I2C0,
- PCH_DEVFN_I2C1,
- PCH_DEVFN_I2C2,
- PCH_DEVFN_I2C3,
- PCH_DEVFN_I2C4,
- PCH_DEVFN_I2C5,
- PCH_DEVFN_GSPI0,
- PCH_DEVFN_GSPI1,
- PCH_DEVFN_GSPI2,
- PCH_DEVFN_UART0,
- PCH_DEVFN_UART1,
- PCH_DEVFN_UART2
-};
-
/* UPD parameters to be initialized before SiliconInit */
void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
{
@@ -223,10 +208,3 @@
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
}
-
-/* Return list of SOC LPSS controllers */
-const pci_devfn_t *soc_lpss_controllers_list(size_t *size)
-{
- *size = ARRAY_SIZE(serial_io_dev);
- return serial_io_dev;
-}
diff --git a/src/soc/intel/jasperlake/fsp_params.c b/src/soc/intel/jasperlake/fsp_params.c
index eefbf6c..dcee306 100644
--- a/src/soc/intel/jasperlake/fsp_params.c
+++ b/src/soc/intel/jasperlake/fsp_params.c
@@ -28,21 +28,6 @@
EOP_DXE,
} EndOfPost;
-static const pci_devfn_t serial_io_dev[] = {
- PCH_DEVFN_I2C0,
- PCH_DEVFN_I2C1,
- PCH_DEVFN_I2C2,
- PCH_DEVFN_I2C3,
- PCH_DEVFN_I2C4,
- PCH_DEVFN_I2C5,
- PCH_DEVFN_GSPI0,
- PCH_DEVFN_GSPI1,
- PCH_DEVFN_GSPI2,
- PCH_DEVFN_UART0,
- PCH_DEVFN_UART1,
- PCH_DEVFN_UART2
-};
-
static void parse_devicetree(FSP_S_CONFIG *params)
{
const struct soc_intel_jasperlake_config *config = config_of_soc();
@@ -266,10 +251,3 @@
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
}
-
-/* Return list of SOC LPSS controllers */
-const pci_devfn_t *soc_lpss_controllers_list(size_t *size)
-{
- *size = ARRAY_SIZE(serial_io_dev);
- return serial_io_dev;
-}
diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c
index 7c9ab88..616daa0 100644
--- a/src/soc/intel/tigerlake/fsp_params.c
+++ b/src/soc/intel/tigerlake/fsp_params.c
@@ -132,22 +132,6 @@
params->SerialIoUartMode[i] = config->SerialIoUartMode[i];
}
-static const pci_devfn_t serial_io_dev[] = {
- PCH_DEVFN_I2C0,
- PCH_DEVFN_I2C1,
- PCH_DEVFN_I2C2,
- PCH_DEVFN_I2C3,
- PCH_DEVFN_I2C4,
- PCH_DEVFN_I2C5,
- PCH_DEVFN_GSPI0,
- PCH_DEVFN_GSPI1,
- PCH_DEVFN_GSPI2,
- PCH_DEVFN_GSPI3,
- PCH_DEVFN_UART0,
- PCH_DEVFN_UART1,
- PCH_DEVFN_UART2
-};
-
__weak void mainboard_update_soc_chip_config(struct soc_intel_tigerlake_config *config)
{
/* Override settings per board. */
@@ -483,10 +467,3 @@
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
}
-
-/* Return list of SOC LPSS controllers */
-const pci_devfn_t *soc_lpss_controllers_list(size_t *size)
-{
- *size = ARRAY_SIZE(serial_io_dev);
- return serial_io_dev;
-}
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