Kyösti Mälkki has uploaded this change for review.
arch/x86: Remove weak tsc_freq_mhz() implementation
Build with TSC_CONSTANT_RATE must fail when this function
is not implemented for the platform. Weak implementation
causes division by zero in timer_monotonic_get() and
turns udelay() into no delay.
Change-Id: Id3b105ea3aac37cd0cba18ce2fb06d87a055486f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
---
M src/arch/x86/timestamp.c
1 file changed, 3 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/30762/1
diff --git a/src/arch/x86/timestamp.c b/src/arch/x86/timestamp.c
index 928d7d7..cbc7bac 100644
--- a/src/arch/x86/timestamp.c
+++ b/src/arch/x86/timestamp.c
@@ -21,15 +21,10 @@
return rdtscll();
}
-unsigned long __weak tsc_freq_mhz(void)
-{
- /* Default to not knowing TSC frequency. cbmem will have to fallback
- * on trying to determine it in userspace. */
- return 0;
-}
-
int timestamp_tick_freq_mhz(void)
{
/* Chipsets that have a constant TSC provide this value correctly. */
- return tsc_freq_mhz();
+ if (IS_ENABLED(CONFIG_TSC_CONSTANT_RATE))
+ return tsc_freq_mhz();
+ return 0;
}
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