awokd@danwin1210.me uploaded patch set #2 to this change.

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vc/amd/agesa/[...]/Proc/Mem: Fix uninitialized scalar variable

FinalRxEnCycle[ByteLane] does not get set in mtthrcSeedTrain.c if
(((UINT16) FinalRxEnCycle[ByteLane] >= NBPtr->MinRxEnSeedGross) && \
 ((UINT16) FinalRxEnCycle[ByteLane] <= NBPtr->MaxRxEnSeedTotal))
evaluates FALSE. According to Coverity, this could result in cases where
RxEnDlyTargetValue[ByteLane] = FinalRxEnCycle[ByteLane] is used with an
uninitialized value. Move the FinalRxEnCycle[ByteLane] initial
assignment up a line so it gets initialized regardless. Tested on
Lenovo G505s.

Change-Id: Id1d3580c8915ba31e87059851fec2ae4b8b0e1da
Signed-off-by: Joe Moore <awokd@danwin1210.me>
Found-by: Coverity CID 1370599
---
M src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mtthrcSeedTrain.c
M src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/mtthrcSeedTrain.c
2 files changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/38495/2

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