HAOUAS Elyes has uploaded this change for review.

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sb/intel/fsp_rangeley: Use CONFIG_HPET_ADDRESS value

Change-Id: I24df64054fc71a2494670f28653ac78a6c4786ae
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
---
M src/southbridge/intel/fsp_rangeley/acpi/lpc.asl
1 file changed, 4 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/36470/1

diff --git a/src/southbridge/intel/fsp_rangeley/acpi/lpc.asl b/src/southbridge/intel/fsp_rangeley/acpi/lpc.asl
index b53e98f..a896dad 100644
--- a/src/southbridge/intel/fsp_rangeley/acpi/lpc.asl
+++ b/src/southbridge/intel/fsp_rangeley/acpi/lpc.asl
@@ -97,7 +97,7 @@
 
 		Name(BUF0, ResourceTemplate()
 		{
-			Memory32Fixed(ReadOnly, 0xfed00000, 0x400, FED0)
+			Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
 		})
 
 		Method (_STA, 0)	// Device Status
@@ -120,15 +120,15 @@
 			If (HPTE) {
 				CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
 				If (Lequal(HPAS, 1)) {
-					Store(0xfed01000, HPT0)
+					Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0)
 				}
 
 				If (Lequal(HPAS, 2)) {
-					Store(0xfed02000, HPT0)
+					Add(CONFIG_HPET_ADDRESS, 0x2000, HPT0)
 				}
 
 				If (Lequal(HPAS, 3)) {
-					Store(0xfed03000, HPT0)
+					Add(CONFIG_HPET_ADDRESS, 0x3000, HPT0)
 				}
 			}
 

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