Patrick Georgi submitted this change.

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Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Angel Pons: Looks good to me, approved
soc/intel/jasperlake: Invoke PCIe root port swapping

Invoke PCIe root port devicetree update to swap the enabled root port
devices with the disabled devices.

BUG=b:162046161
TEST=Ensure that the PCIe device 1c.7 corresponding to Root port 8 is
swapped with the PCIe device 1c.0 corresponding to Root port 1.

Change-Id: I7d422014a2f5cafc41296ce0a2c116c82aefb0d7
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43835
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/soc/intel/jasperlake/chip.c
1 file changed, 9 insertions(+), 0 deletions(-)

diff --git a/src/soc/intel/jasperlake/chip.c b/src/soc/intel/jasperlake/chip.c
index 0440451..36e0175 100644
--- a/src/soc/intel/jasperlake/chip.c
+++ b/src/soc/intel/jasperlake/chip.c
@@ -7,6 +7,7 @@
#include <intelblocks/acpi.h>
#include <intelblocks/cfg.h>
#include <intelblocks/itss.h>
+#include <intelblocks/pcie_rp.h>
#include <intelblocks/xdci.h>
#include <romstage_handoff.h>
#include <soc/intel/common/vbt.h>
@@ -15,6 +16,11 @@
#include <soc/ramstage.h>
#include <soc/soc_chip.h>

+static const struct pcie_rp_group pch_rp_groups[] = {
+ { .slot = PCH_DEV_SLOT_PCIE, .count = 8 },
+ { 0 }
+};
+
#if CONFIG(HAVE_ACPI_TABLES)
const char *soc_acpi_name(const struct device *dev)
{
@@ -132,6 +138,9 @@
itss_restore_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END);

soc_fill_gpio_pm_configuration();
+
+ /* swap enabled PCI ports in device tree if needed */
+ pcie_rp_update_devicetree(pch_rp_groups);
}

static struct device_operations pci_domain_ops = {

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I7d422014a2f5cafc41296ce0a2c116c82aefb0d7
Gerrit-Change-Number: 43835
Gerrit-PatchSet: 3
Gerrit-Owner: Karthik Ramasubramanian <kramasub@google.com>
Gerrit-Reviewer: Aamir Bohra <aamir.bohra@intel.com>
Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Furquan Shaikh <furquan@google.com>
Gerrit-Reviewer: Justin TerAvest <teravest@chromium.org>
Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak@chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: merged