View Change

2 comments:

• File src/arch/riscv/include/arch/smp/spinlock.h:

  • Patch Set #2, Line 30: } while (atomic_cas(&lock->lock, 0, -1));

    As far as I understand it, CAS is not a native operation on RISC-V. What does this compile to?

  • Patch Set #2, Line 39:

    Some primitives are missing, compared to the x86 pendant, but I think it's ok to add them later, when they're needed.

To view, visit change 27356. To unsubscribe, or for help writing mail filters, visit settings.