Tested with booting PC Engines APU2 on top of the postcar stage patches in the relation chain.
It neither improves boot time nor size. Just removes the hardcoded value which is not elegant by reading the value from silicon initialization code.
View Change
2 comments:
Commit Message:
Patch Set #2, Line 9: are
is
Done
Patch Set #2, Line 10:
parameter
block of an AGESA
What is that?
Rephrased it a little bit. In short, we interface AMD proprietary initialization blob called AGESA which holds the configuration values for the processor/SoC used in initialization process inside the blob.
To view, visit change 34589. To unsubscribe, or for help writing mail filters, visit settings.
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ib3ddfe606720143659e57fbbca7f7a3e655a7664
Gerrit-Change-Number: 34589
Gerrit-PatchSet: 3
Gerrit-Owner: Krystian Hebel <krystian.hebel@3mdeb.com>
Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki@gmail.com>
Gerrit-Reviewer: Martin Roth <martinroth@google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Michał Żygowski <michal.zygowski@3mdeb.com>
Gerrit-Comment-Date: Fri, 04 Oct 2019 10:39:59 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-MessageType: comment