Patrick Georgi submitted this change.

View Change

Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
mb/intel/d510mo/devicetree.cb: Indent with tabs

This is a cosmetic change.
Make the formatting consistent with the rest of the tree.

Change-Id: Ic90e5584938592f1c2ab41edfcc773702822070d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51149
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
---
M src/mainboard/intel/d510mo/devicetree.cb
1 file changed, 94 insertions(+), 94 deletions(-)

diff --git a/src/mainboard/intel/d510mo/devicetree.cb b/src/mainboard/intel/d510mo/devicetree.cb
index 7486f7e..22e67e7 100644
--- a/src/mainboard/intel/d510mo/devicetree.cb
+++ b/src/mainboard/intel/d510mo/devicetree.cb
@@ -1,100 +1,100 @@
# SPDX-License-Identifier: GPL-2.0-or-later

chip northbridge/intel/pineview # Northbridge
- register "gfx.use_spread_spectrum_clock" = "0"
- register "use_crt" = "1"
- register "use_lvds" = "0"
+ register "gfx.use_spread_spectrum_clock" = "0"
+ register "use_crt" = "1"
+ register "use_lvds" = "0"

- device cpu_cluster 0 on # APIC cluster
- chip cpu/intel/socket_FCBGA559 # CPU
- device lapic 0 on end # APIC
- end
- end
- device domain 0 on # PCI domain
- device pci 0.0 on end # Host Bridge
- device pci 1.0 off end # PEG
- device pci 2.0 on end # Integrated graphics controller
- device pci 2.1 on end # Integrated graphics controller 2
- chip southbridge/intel/i82801gx # Southbridge
- register "pirqa_routing" = "0x0b"
- register "pirqb_routing" = "0x0b"
- register "pirqc_routing" = "0x0b"
- register "pirqd_routing" = "0x0b"
- register "pirqe_routing" = "0x0b"
- register "pirqf_routing" = "0x0b"
- register "pirqg_routing" = "0x0b"
- register "pirqh_routing" = "0x0b"
- register "sata_ports_implemented" = "0x3"
- register "gpe0_en" = "0x20000040"
+ device cpu_cluster 0 on # APIC cluster
+ chip cpu/intel/socket_FCBGA559 # CPU
+ device lapic 0 on end # APIC
+ end
+ end
+ device domain 0 on # PCI domain
+ device pci 0.0 on end # Host Bridge
+ device pci 1.0 off end # PEG
+ device pci 2.0 on end # Integrated graphics controller
+ device pci 2.1 on end # Integrated graphics controller 2
+ chip southbridge/intel/i82801gx # Southbridge
+ register "pirqa_routing" = "0x0b"
+ register "pirqb_routing" = "0x0b"
+ register "pirqc_routing" = "0x0b"
+ register "pirqd_routing" = "0x0b"
+ register "pirqe_routing" = "0x0b"
+ register "pirqf_routing" = "0x0b"
+ register "pirqg_routing" = "0x0b"
+ register "pirqh_routing" = "0x0b"
+ register "sata_ports_implemented" = "0x3"
+ register "gpe0_en" = "0x20000040"

- device pci 1b.0 on end # Audio
- device pci 1c.0 on # PCIe 1
- device pci 0.0 on end # NIC
- end
- device pci 1c.1 on end # PCIe 2
- device pci 1c.2 on end # PCIe 3
- device pci 1c.3 on end # PCIe 4
- device pci 1d.0 on end # USB
- device pci 1d.1 on end # USB
- device pci 1d.2 on end # USB
- device pci 1d.3 on end # USB
- device pci 1d.7 on end # USB
- device pci 1e.0 on end # PCI bridge
- #device pci 1e.2 off end # AC'97 Audio (not on nm10?)
- #device pci 1e.3 off end # AC'97 Modem (not on nm10?)
- device pci 1f.0 on # ISA bridge
- chip superio/winbond/w83627thg # Super I/O
- device pnp 4e.0 off end # Floppy
- device pnp 4e.1 on # Parallel port
- io 0x60 = 0x378
- irq 0x70 = 7
- drq 0x74 = 4
- end
- device pnp 4e.2 on # COM1
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 4e.3 on # COM2
- io 0x60 = 0x2f8
- irq 0x70 = 3
- irq 0xf1 = 0
- end
- device pnp 4e.5 on # PS/2 keyboard / mouse
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 1 # PS/2 keyboard interrupt
- irq 0x72 = 12 # PS/2 mouse interrupt
- irq 0xf0 = 0x80
- end
- device pnp 4e.6 off end
- device pnp 4e.7 off end
- device pnp 4e.8 off end
- device pnp 4e.9 off end
- device pnp 4e.a off end # ACPI
- device pnp 4e.b on # HWM
- io 0x60 = 0x290
- irq 0x70 = 0
- end
- end
- end
- device pci 1f.1 off end # PATA
- device pci 1f.2 on end # SATA
- device pci 1f.3 on # SMbus
- chip drivers/i2c/ck505 # ICS9EPRS525
- register "mask" = "{ 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff,
- 0xff }"
- register "regs" = "{ 0x61, 0xd9, 0xfe, 0xff,
- 0xff, 0x00, 0x00, 0x01,
- 0x03, 0x25, 0x83, 0x17,
- 0x0d }"
- device i2c 69 on end
- end
- end
- device pci 1f.4 off end
- device pci 1f.5 off end
- device pci 1f.6 off end
- end
- end
+ device pci 1b.0 on end # Audio
+ device pci 1c.0 on # PCIe 1
+ device pci 0.0 on end # NIC
+ end
+ device pci 1c.1 on end # PCIe 2
+ device pci 1c.2 on end # PCIe 3
+ device pci 1c.3 on end # PCIe 4
+ device pci 1d.0 on end # USB
+ device pci 1d.1 on end # USB
+ device pci 1d.2 on end # USB
+ device pci 1d.3 on end # USB
+ device pci 1d.7 on end # USB
+ device pci 1e.0 on end # PCI bridge
+ #device pci 1e.2 off end # AC'97 Audio (not on nm10?)
+ #device pci 1e.3 off end # AC'97 Modem (not on nm10?)
+ device pci 1f.0 on # ISA bridge
+ chip superio/winbond/w83627thg # Super I/O
+ device pnp 4e.0 off end # Floppy
+ device pnp 4e.1 on # Parallel port
+ io 0x60 = 0x378
+ irq 0x70 = 7
+ drq 0x74 = 4
+ end
+ device pnp 4e.2 on # COM1
+ io 0x60 = 0x3f8
+ irq 0x70 = 4
+ end
+ device pnp 4e.3 on # COM2
+ io 0x60 = 0x2f8
+ irq 0x70 = 3
+ irq 0xf1 = 0
+ end
+ device pnp 4e.5 on # PS/2 keyboard / mouse
+ io 0x60 = 0x60
+ io 0x62 = 0x64
+ irq 0x70 = 1 # PS/2 keyboard interrupt
+ irq 0x72 = 12 # PS/2 mouse interrupt
+ irq 0xf0 = 0x80
+ end
+ device pnp 4e.6 off end
+ device pnp 4e.7 off end
+ device pnp 4e.8 off end
+ device pnp 4e.9 off end
+ device pnp 4e.a off end # ACPI
+ device pnp 4e.b on # HWM
+ io 0x60 = 0x290
+ irq 0x70 = 0
+ end
+ end
+ end
+ device pci 1f.1 off end # PATA
+ device pci 1f.2 on end # SATA
+ device pci 1f.3 on # SMbus
+ chip drivers/i2c/ck505 # ICS9EPRS525
+ register "mask" = "{ 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff,
+ 0xff }"
+ register "regs" = "{ 0x61, 0xd9, 0xfe, 0xff,
+ 0xff, 0x00, 0x00, 0x01,
+ 0x03, 0x25, 0x83, 0x17,
+ 0x0d }"
+ device i2c 69 on end
+ end
+ end
+ device pci 1f.4 off end
+ device pci 1f.5 off end
+ device pci 1f.6 off end
+ end
+ end
end

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic90e5584938592f1c2ab41edfcc773702822070d
Gerrit-Change-Number: 51149
Gerrit-PatchSet: 5
Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Damien Zammit
Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: merged