1 comment:
File src/drivers/genesyslogic/gl9763e/gl9763e.c:
Patch Set #6, Line 23: pci_update_config32(dev, VHS, ~VHS_REV_MASK, VHS_REV_R);
ASPM control is on Line 20. […]
Maybe add this information as comments above each line?
/* Set VHS (Vendor Header Space) to be writable */
pci_update_config32(dev, VHS, ~VHS_REV_MASK, VHS_REV_W);
/* Set single AXI request */
pci_or_config32(dev, SCR, SCR_AXI_REQ);
/* Disable L0s support */
pci_and_config32(dev, CFG_REG_2, ~CFG_REG_2_L0S);
/* Set SSC to 30000 ppm */
pci_update_config32(dev, PLL_CTL_2, ~PLL_CTL_2_MAX_SSC_MASK, MAX_SSC_30000PPM);
/* Enable SSC */
pci_or_config32(dev, PLL_CTL, PLL_CTL_SSC);
/* Set VHS to read-only */
pci_update_config32(dev, VHS, ~VHS_REV_MASK, VHS_REV_R);
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