Paul Menzel has uploaded this change for review.

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mb/clevo/kbl-u: Install Intel VGA INT15 handler

    Timestamp - Option ROM initialization: 77806110188
    FMAP: area COREBOOT found @ 350200 (4914688 bytes)
    CBFS: Locating 'pci8086,5916.rom'
    CBFS: Found @ offset 11ce00 size 10000
    In CBFS, ROM address for PCI: 00:02.0 = 0xffc6d048
    PCI ROM image, vendor ID 8086, device ID 0406,
    ID mismatch: vendor ID 8086, device ID 5916
    Copying VGA ROM Image from 0xffc6d048 to 0xc0000, 0x10000 bytes
    Timestamp - Option ROM copy done: 77877204844
    Calling Option ROM...
    Unsupported software interrupt #0x15 eax 0x1905f34
    Unsupported software interrupt #0x15 eax 0x5f51
    Unsupported software interrupt #0x15 eax 0x5f40
    Unsupported software interrupt #0x15 eax 0x5f52
    Unsupported software interrupt #0x15 eax 0x5f49
    Unsupported software interrupt #0x15 eax 0x3a95f49
    Unsupported software interrupt #0x15 eax 0x5f14
    Unsupported software interrupt #0x15 eax 0x405f35
    ... Option ROM returned.
    VGA Option ROM was run
    Timestamp - Option ROM run done: 78406420234
    PCI: 00:02.0 init finished in 210 msecs

Change-Id: I126481c745ae701dc438ac664be0f8ff5f6250c1
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
---
A src/mainboard/clevo/kbl-u/mainboard.c
1 file changed, 15 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/43852/1

diff --git a/src/mainboard/clevo/kbl-u/mainboard.c b/src/mainboard/clevo/kbl-u/mainboard.c
new file mode 100644
index 0000000..01cfef4
--- /dev/null
+++ b/src/mainboard/clevo/kbl-u/mainboard.c
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/device.h>
+#include <drivers/intel/gma/int15.h>
+
+static void mainboard_enable(struct device *dev)
+{
+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP,
+					GMA_INT15_PANEL_FIT_CENTERING,
+					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
+}
+
+struct chip_operations mainboard_ops = {
+	.enable_dev = mainboard_enable,
+};

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