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Patrick Rudolph uploaded patch set #5 to this change.

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soc/intel/xeon_sp: Initial support for PCI multi segment groups

Add PCI enumeration support by reading the PCIeSegment reported in the
FSP HOB and add it when creating the PCI domain for each stack.

The PCI enumeration will be able to scan the additional PCI segment
groups and properly handle those devices. Code that still hardcodes
B:D:F numbers will not work when PCI multi segment support is enabled
and need to be updated in future commits.

In addition ACPI code generation needs to take PCI segment groups
into account.

Change-Id: I0ba5e426123234979d746d3bdfc1ddfbd71c3447
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
M src/soc/intel/xeon_sp/chip_common.c
M src/soc/intel/xeon_sp/include/soc/chip_common.h
M src/soc/intel/xeon_sp/spr/ioat.c
3 files changed, 48 insertions(+), 17 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/79878/5

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