[coreboot-gerrit] Change in coreboot[master]: soc/intel/skl: Replace dt `HeciEnabled` by `CSE disable` config

[Angel Pons (Code Review)]

Attention is currently required from: Felix Singer, Erik van den Bogaert, Michał Żygowski, Subrata Banik, Frans Hendriks, Tim Wawrzynczak, Michael Niewöhner, Patrick Rudolph, Piotr Król.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60722 )

Change subject: soc/intel/skl: Replace dt `HeciEnabled` by `CSE disable` config
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Patch Set 3: Code-Review+1

(2 comments)

File src/mainboard/asrock/h110m/Kconfig:

https://review.coreboot.org/c/coreboot/+/60722/comment/09e6b74d_b41cc516 
PS3, Line 6: 	select DISABLE_CSE_AT_PRE_BOOT
I think this board as well as some others doesn't require this, but I'll take care of them in follow-ups.

File src/soc/intel/skylake/finalize.c:

https://review.coreboot.org/c/coreboot/+/60722/comment/77c49b79_5dfd2c5a 
PS3, Line 54: config = config_of(dev);
This is no longer used