Patrick Rudolph uploaded patch set #19 to this change.

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soc/intel/common: Add support for LPSS UART in ACPI mode

Emit ACPI code for LPSS UARTs operating in ACPI mode. In this mode the
device vendor ID reads as 0xffff, the PCI devices is still operate.

Add ACPI device IDs for APL, GLK, SPT, SPT_H and CNP_H.

The mainboard's devicetree needs to be adapted to include the chip driver
and the PCI ID when it wouldn't been have hidden.

Example:
               chip soc/intel/common/block/uart
                       device pci 19.2 hidden
                               register "devid" = "PCI_DEVICE_ID_INTEL_CNP_H_UART2"
                       end # UART #2
               end

Tested on Linux 5.6 with Sunrise Point ACPI ID for UART2.
Tested on Windows for all other UARTs.

Change-Id: I838d16322be38f5421c1f63b457a0af552e0ed96
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
A src/soc/intel/common/block/uart/chip.h
M src/soc/intel/common/block/uart/uart.c
2 files changed, 174 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/40405/19

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