Michael Niewöhner uploaded patch set #2 to this change.

View Change

soc/intel/common/block/acpi: add code for CPPC entries generation

This adds the code for CPPC entries generation, needed for Intel
SpeedShift, to common acpi code. The function will be called from the
SoCs' acpi code in the follow-up change.

Change-Id: I1fcc2d0d7c6b6f35f8dd011f55dab8469be99d47
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
---
M src/soc/intel/common/block/acpi/acpi.c
M src/soc/intel/common/block/include/intelblocks/acpi.h
2 files changed, 16 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/45535/2

To view, visit change 45535. To unsubscribe, or for help writing mail filters, visit settings.

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I1fcc2d0d7c6b6f35f8dd011f55dab8469be99d47
Gerrit-Change-Number: 45535
Gerrit-PatchSet: 2
Gerrit-Owner: Michael Niewöhner <foss@mniewoehner.de>
Gerrit-Reviewer: Elyes HAOUAS
Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki@gmail.com>
Gerrit-Reviewer: Nico Huber <nico.h@gmx.de>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-Reviewer: Subrata Banik <subrata.banik@intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: newpatchset