James has uploaded this change for review.
mb/lenovo/x131e: function key support
Enables function keys for X131e.
The IT8518e EC of this board uses some different ACPI methods compared to the
regular Lenovo H8. Add an option to use the alternative set of methods.
Change-Id: Ib3a01f37a8b54889b55e92c501c9350e6c68bd57
Signed-off-by: James Ye <jye836@gmail.com>
---
M src/ec/lenovo/h8/Kconfig
M src/ec/lenovo/h8/acpi/ec.asl
M src/mainboard/lenovo/x131e/Kconfig
M src/mainboard/lenovo/x131e/Makefile.inc
M src/mainboard/lenovo/x131e/devicetree.cb
A src/mainboard/lenovo/x131e/ec.h
M src/mainboard/lenovo/x131e/mainboard.c
M src/mainboard/lenovo/x131e/romstage.c
A src/mainboard/lenovo/x131e/smihandler.c
9 files changed, 146 insertions(+), 22 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/31067/1
diff --git a/src/ec/lenovo/h8/Kconfig b/src/ec/lenovo/h8/Kconfig
index f9b0b14..3dab615 100644
--- a/src/ec/lenovo/h8/Kconfig
+++ b/src/ec/lenovo/h8/Kconfig
@@ -28,6 +28,12 @@
Disable BDC detection and assume bluetooth is installed. Required for
bluetooth on wifi cards, as it's not possible to detect it in coreboot.
+config H8_ALT_EC_QUERY
+ bool "Alternate ACPI EC query methods"
+ default n
+ help
+ Use alternative EC query methods for X131e
+
endif
config H8_DOCK_EARLY_INIT
diff --git a/src/ec/lenovo/h8/acpi/ec.asl b/src/ec/lenovo/h8/acpi/ec.asl
index 327a2cf..7c96504 100644
--- a/src/ec/lenovo/h8/acpi/ec.asl
+++ b/src/ec/lenovo/h8/acpi/ec.asl
@@ -140,7 +140,11 @@
/* Sleep Button pressed */
Method(_Q13, 0, NotSerialized)
{
+#ifndef CONFIG_H8_ALT_EC_QUERY
Notify(^SLPB, 0x80)
+#else
+ ^HKEY.RHK(0x04)
+#endif
}
/* Brightness up GPE */
@@ -217,9 +221,20 @@
Method (_Q17, 0, NotSerialized)
{
+#ifndef CONFIG_H8_ALT_EC_QUERY
^HKEY.RHK (0x08)
+#else
+ BRIGHTNESS_DOWN()
+#endif
}
+#ifdef CONFIG_H8_ALT_EC_QUERY
+ Method (_Q18, 0, NotSerialized)
+ {
+ BRIGHTNESS_UP()
+ }
+#endif
+
Method (_Q66, 0, NotSerialized)
{
^HKEY.RHK (0x0A)
diff --git a/src/mainboard/lenovo/x131e/Kconfig b/src/mainboard/lenovo/x131e/Kconfig
index 946b945..ee7a83f 100644
--- a/src/mainboard/lenovo/x131e/Kconfig
+++ b/src/mainboard/lenovo/x131e/Kconfig
@@ -8,6 +8,7 @@
select USE_NATIVE_RAMINIT
select SOUTHBRIDGE_INTEL_C216
select EC_LENOVO_H8
+ select H8_ALT_EC_QUERY
select NO_UART_ON_SUPERIO
select BOARD_ROMSIZE_KB_12288
select HAVE_ACPI_TABLES
diff --git a/src/mainboard/lenovo/x131e/Makefile.inc b/src/mainboard/lenovo/x131e/Makefile.inc
index 7a00cce..2dab950 100644
--- a/src/mainboard/lenovo/x131e/Makefile.inc
+++ b/src/mainboard/lenovo/x131e/Makefile.inc
@@ -13,6 +13,7 @@
## GNU General Public License for more details.
##
+smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
romstage-y += gpio.c
ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
diff --git a/src/mainboard/lenovo/x131e/devicetree.cb b/src/mainboard/lenovo/x131e/devicetree.cb
index 3d0148f..0a73010 100644
--- a/src/mainboard/lenovo/x131e/devicetree.cb
+++ b/src/mainboard/lenovo/x131e/devicetree.cb
@@ -47,7 +47,8 @@
chip southbridge/intel/bd82x6x
# GPI routing
- register "alt_gp_smi_en" = "0x0000"
+ register "alt_gp_smi_en" = "0x0002"
+ register "gpi1_routing" = "1"
register "gpi6_routing" = "2"
register "gpi13_routing" = "2"
@@ -115,22 +116,10 @@
register "beepmask1" = "0x87"
register "has_power_management_beeps" = "0"
- register "event0_enable" = "0xff"
- register "event1_enable" = "0xff"
- register "event2_enable" = "0xff"
- register "event3_enable" = "0xff"
- register "event4_enable" = "0xff"
- register "event5_enable" = "0xff"
- register "event6_enable" = "0xff"
- register "event7_enable" = "0xff"
- register "event8_enable" = "0xff"
- register "event9_enable" = "0xff"
- register "eventa_enable" = "0xff"
- register "eventb_enable" = "0xff"
- register "eventc_enable" = "0xff"
- register "eventd_enable" = "0xff"
- register "evente_enable" = "0xff"
- register "eventf_enable" = "0xff"
+ register "event2_enable" = "0xc8" # sleep, monitor, brightness down
+ register "event3_enable" = "0x01" # brightness up
+ register "eventc_enable" = "0x30" # airplane, camera
+ register "eventd_enable" = "0x04" # mic
register "has_bdc_detection" = "0"
diff --git a/src/mainboard/lenovo/x131e/ec.h b/src/mainboard/lenovo/x131e/ec.h
new file mode 100644
index 0000000..4a731dc
--- /dev/null
+++ b/src/mainboard/lenovo/x131e/ec.h
@@ -0,0 +1,26 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 The Chromium OS Authors. All rights reserved.
+ * Copyright (C) 2019 James Ye <jye836@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef X131E_EC_H
+#define X131E_EC_H
+
+#define GPE_EC_SCI 6
+#define GPE_EC_WAKE 13
+
+#define EC_CMD_NOTIFY_ACPI_ENTER 0x86
+#define EC_CMD_NOTIFY_ACPI_EXIT 0x87
+
+#endif // X131E_EC_H
diff --git a/src/mainboard/lenovo/x131e/mainboard.c b/src/mainboard/lenovo/x131e/mainboard.c
index 1342aca..9e6a7dd 100644
--- a/src/mainboard/lenovo/x131e/mainboard.c
+++ b/src/mainboard/lenovo/x131e/mainboard.c
@@ -13,9 +13,17 @@
* GNU General Public License for more details.
*/
+#include <arch/acpi.h>
#include <device/device.h>
#include <drivers/intel/gma/int15.h>
+#include <ec/acpi/ec.h>
#include <ec/lenovo/h8/h8.h>
+#include "ec.h"
+
+void mainboard_suspend_resume(void)
+{
+ send_ec_command(EC_CMD_NOTIFY_ACPI_ENTER);
+}
static void mainboard_enable(struct device *dev)
{
diff --git a/src/mainboard/lenovo/x131e/romstage.c b/src/mainboard/lenovo/x131e/romstage.c
index 43e0bd7..30df36f 100644
--- a/src/mainboard/lenovo/x131e/romstage.c
+++ b/src/mainboard/lenovo/x131e/romstage.c
@@ -26,11 +26,6 @@
/* Enable TPM, EC, PS/2 Keyboard/Mouse */
pci_write_config16(PCH_LPC_DEV, LPC_EN,
CNF2_LPC_EN | CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN);
-
- pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, 0x007c1611);
- pci_write_config32(PCH_LPC_DEV, LPC_GEN2_DEC, 0x00040069);
- pci_write_config32(PCH_LPC_DEV, LPC_GEN3_DEC, 0x000c0701);
- pci_write_config32(PCH_LPC_DEV, LPC_GEN4_DEC, 0x000c06a1);
}
void mainboard_rcba_config(void)
diff --git a/src/mainboard/lenovo/x131e/smihandler.c b/src/mainboard/lenovo/x131e/smihandler.c
new file mode 100644
index 0000000..a634359
--- /dev/null
+++ b/src/mainboard/lenovo/x131e/smihandler.c
@@ -0,0 +1,83 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2008-2009 coresystems GmbH
+ * Copyright (C) 2014 Vladimir Serbinenko
+ * Copyright (C) 2019 James Ye <jye836@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <console/console.h>
+#include <cpu/x86/smm.h>
+#include <ec/acpi/ec.h>
+#include <ec/lenovo/h8/h8.h>
+#include <southbridge/intel/bd82x6x/pch.h>
+#include <southbridge/intel/common/pmutil.h>
+#include "ec.h"
+
+static void mainboard_smi_handle_ec_sci(void)
+{
+ u8 status = ec_status();
+ if (!(status & EC_SCI_EVT))
+ return;
+
+ u8 event = ec_query();
+ printk(BIOS_DEBUG, "EC event %02x\n", event);
+}
+
+void mainboard_smi_gpi(u32 gpi_sts)
+{
+ if (gpi_sts & (1 << GPE_EC_SCI))
+ mainboard_smi_handle_ec_sci();
+}
+
+int mainboard_smi_apmc(u8 data)
+{
+ switch (data) {
+ case APM_CNT_ACPI_ENABLE:
+ send_ec_command(EC_CMD_NOTIFY_ACPI_ENTER);
+ /* use 0x1600/0x1604 to prevent races with userspace */
+ ec_set_ports(0x1604, 0x1600);
+ /* route EC_SCI to SCI */
+ gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SCI);
+ /* discard all events, and enable attention */
+ ec_write(0x80, 0x01);
+ break;
+ case APM_CNT_ACPI_DISABLE:
+ send_ec_command(EC_CMD_NOTIFY_ACPI_EXIT);
+ /* we have to use port 0x62/0x66, as 0x1600/0x1604 doesn't
+ provide a EC query function */
+ ec_set_ports(EC_SC, EC_DATA);
+ /* route EC_SCI to SMI */
+ gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SMI);
+ /* discard all events, and enable attention */
+ ec_write(0x80, 0x01);
+ break;
+ }
+ return 0;
+}
+
+void mainboard_smi_sleep(u8 slp_typ)
+{
+ if (slp_typ == 3) {
+ u8 ec_wake = ec_read(0x32);
+ /* If EC wake events are enabled, enable wake on EC WAKE GPE. */
+ if (ec_wake & 0x14) {
+ /* Redirect EC WAKE GPE to SCI. */
+ gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
+ }
+ }
+
+ //outb(0xe9, 0x64); // EC_KBD_CMD_MUTE
+ //ec_set_bit(0xbf, 4); // EC_WAKE_SRC_ENABLE, EC_LID_WAKE_ENABLE
+}
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