Angel Pons has uploaded this change for review.
cpu/intel/model_106cx/Makefile.inc: Order entries
Group lines by stages, then subdirs, then microcode. Within groups,
order in ascending count of `../` in prefix and then alphabetically.
Group CPU models separately from other subdirs, as they are special.
Tested with BUILD_TIMELESS=1, Intel D945GCLF remains identical.
Change-Id: I0aa6b46ae2f114fe1fa6b0a74669e09e142e2b05
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M src/cpu/intel/model_106cx/Makefile.inc
1 file changed, 3 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/44224/1
diff --git a/src/cpu/intel/model_106cx/Makefile.inc b/src/cpu/intel/model_106cx/Makefile.inc
index 6d8414e..8b1be1e 100644
--- a/src/cpu/intel/model_106cx/Makefile.inc
+++ b/src/cpu/intel/model_106cx/Makefile.inc
@@ -1,6 +1,7 @@
ramstage-y += model_106cx_init.c
-subdirs-y += ../../x86/name
-subdirs-y += ../smm/gen1
ramstage-$(CONFIG_PARALLEL_MP) += ../model_1067x/mp_init.c
+subdirs-y += ../smm/gen1
+subdirs-y += ../../x86/name
+
cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-1c-*)
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