Angel Pons has uploaded this change for review.
nb/intel/sandybridge/acpi.c: Add RMRRs after all DRHDs
The VT-d architecture specification (Doc. D51397-011, Rev. 3.1) says:
BIOS implementations must report these remapping structure types in
numerical order. i.e., All remapping structures of type 0 (DRHD)
enumerated before remapping structures of type 1 (RMRR), and so forth.
So, update the corresponding code to adhere to the specification.
Change-Id: I1f84cae41c6281e0d545669f1e7de5cab0d9f9c0
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M src/northbridge/intel/sandybridge/acpi.c
1 file changed, 22 insertions(+), 16 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/44109/1
diff --git a/src/northbridge/intel/sandybridge/acpi.c b/src/northbridge/intel/sandybridge/acpi.c
index 2cfb9ee..755d446 100644
--- a/src/northbridge/intel/sandybridge/acpi.c
+++ b/src/northbridge/intel/sandybridge/acpi.c
@@ -73,16 +73,35 @@
{
const struct device *const igfx = pcidev_on_root(2, 0);
+ /* First, add DRHD entries */
if (igfx && igfx->enabled) {
- unsigned long tmp;
+ const unsigned long tmp = current;
- tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, GFXVT_BASE);
current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
current += acpi_create_dmar_ds_pci(current, 0, 2, 1);
acpi_dmar_drhd_fixup(tmp, current);
+ }
- tmp = current;
+ {
+ const unsigned long tmp = current;
+ current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL, 0, VTVC0_BASE);
+
+ current += acpi_create_dmar_ds_ioapic(current, 2, PCH_IOAPIC_PCI_BUS,
+ PCH_IOAPIC_PCI_SLOT, 0);
+
+ size_t i;
+ for (i = 0; i < 8; ++i)
+ current += acpi_create_dmar_ds_msi_hpet(current, 0, PCH_HPET_PCI_BUS,
+ PCH_HPET_PCI_SLOT, i);
+
+ acpi_dmar_drhd_fixup(tmp, current);
+ }
+
+ /* Then, add RMRR entries after all DRHD entries */
+ if (igfx && igfx->enabled) {
+ const unsigned long tmp = current;
+
current += acpi_create_igfx_rmrr(current);
if (current != tmp) {
current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
@@ -91,19 +110,6 @@
}
}
- const unsigned long tmp = current;
- current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL, 0, VTVC0_BASE);
-
- current += acpi_create_dmar_ds_ioapic(current, 2, PCH_IOAPIC_PCI_BUS,
- PCH_IOAPIC_PCI_SLOT, 0);
-
- size_t i;
- for (i = 0; i < 8; ++i)
- current += acpi_create_dmar_ds_msi_hpet(current, 0, PCH_HPET_PCI_BUS,
- PCH_HPET_PCI_SLOT, i);
-
- acpi_dmar_drhd_fixup(tmp, current);
-
return current;
}
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