Attention is currently required from: Patrick Rudolph.
Tim Wawrzynczak uploaded patch set #3 to this change.
soc/intel/tigerlake: Define soc_get_pcie_rp_type
In order to distinguish PCH from CPU PCIe RPs, define the
soc_get_pcie_rp_type function for Tiger Lake.
BUG=b:197983574
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Ic3f7d3f2fc12ae2b53604cd8f8b694a7674c3620
---
M src/soc/intel/common/block/include/intelblocks/pcie_rp.h
M src/soc/intel/tigerlake/Makefile.inc
A src/soc/intel/tigerlake/pcie_rp.c
3 files changed, 56 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/59853/3
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