Angel Pons has uploaded this change for review.

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[WIP] fix autoport

Change-Id: I8d1a6af6f1d70268f17692bee130c08502082c97
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M util/autoport/azalia.go
M util/autoport/bd82x6x.go
2 files changed, 13 insertions(+), 27 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/37730/1

diff --git a/util/autoport/azalia.go b/util/autoport/azalia.go
index c525189..e00f457 100644
--- a/util/autoport/azalia.go
+++ b/util/autoport/azalia.go
@@ -20,13 +20,12 @@
 `)
 
 	for _, codec := range ctx.InfoSource.GetAzaliaCodecs() {
-		fmt.Fprintf(az, "\t0x%08x, /* Codec Vendor / Device ID: %s */\n",
+		fmt.Fprintf(az, "\t0x%08x,\t/* Codec Vendor / Device ID: %s */\n",
 			codec.VendorID, codec.Name)
-		fmt.Fprintf(az, "\t0x%08x, /* Subsystem ID */\n",
+		fmt.Fprintf(az, "\t0x%08x,\t/* Subsystem ID */\n",
 			codec.SubsystemID)
-		fmt.Fprintf(az, "\n\t0x%08x, /* Number of 4 dword sets */\n",
+		fmt.Fprintf(az, "\n\t%d,\t\t/* Number of 4 dword sets */\n",
 			len(codec.PinConfig)+1)
-		fmt.Fprintf(az, "\t/* NID 0x01: Subsystem ID.  */\n")
 		fmt.Fprintf(az, "\tAZALIA_SUBVENDOR(0x%x, 0x%08x),\n",
 			codec.CodecNo, codec.SubsystemID)
 
@@ -38,7 +37,6 @@
 		sort.Ints(keys)
 
 		for _, nid := range keys {
-			fmt.Fprintf(az, "\n\t/* NID 0x%02x.  */\n", nid)
 			fmt.Fprintf(az, "\tAZALIA_PIN_CFG(0x%x, 0x%02x, 0x%08x),\n",
 				codec.CodecNo, nid, codec.PinConfig[nid])
 		}
diff --git a/util/autoport/bd82x6x.go b/util/autoport/bd82x6x.go
index fbe0c3a..1cee9f2 100644
--- a/util/autoport/bd82x6x.go
+++ b/util/autoport/bd82x6x.go
@@ -276,7 +276,7 @@
 	}
 
 	PutPCIChip(addr, cur)
-	PutPCIDevParent(addr, "PCI-LPC bridge", "lpc")
+	PutPCIDevParent(addr, "LPC bridge", "lpc")
 
 	DSDTIncludes = append(DSDTIncludes, DSDTInclude{
 		File: "southbridge/intel/bd82x6x/acpi/platform.asl",
@@ -286,13 +286,13 @@
 		Comment: "global NVS and variables",
 	})
 	DSDTIncludes = append(DSDTIncludes, DSDTInclude{
-		File: "southbridge/intel/bd82x6x/acpi/sleepstates.asl",
+		File: "southbridge/intel/common/acpi/sleepstates.asl",
 	})
 	DSDTPCI0Includes = append(DSDTPCI0Includes, DSDTInclude{
 		File: "southbridge/intel/bd82x6x/acpi/pch.asl",
 	})
 
-	sb := Create(ctx, "romstage.c")
+	sb := Create(ctx, "early_init.c")
 	defer sb.Close()
 	Add_gpl(sb)
 	sb.WriteString(`/* FIXME: Check if all includes are needed. */
@@ -310,20 +310,7 @@
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
 
-void pch_enable_lpc(void)
-{
 `)
-	RestorePCI16Simple(sb, addr, 0x82)
-
-	RestorePCI16Simple(sb, addr, 0x80)
-
-	sb.WriteString(`}
-
-void mainboard_rcba_config(void)
-{
-`)
-	sb.WriteString("}\n\n")
-
 	sb.WriteString("const struct southbridge_usb_port mainboard_usb_ports[] = {\n")
 
 	currentMap := map[uint32]int{
@@ -360,12 +347,13 @@
 	guessedMap := GuessSPDMap(ctx)
 
 	sb.WriteString(`
-void mainboard_early_init(int s3resume)
-{
-}
+void bootblock_mainboard_early_init(void)
+{`)
+	RestorePCI16Simple(sb, addr, 0x82)
 
-void mainboard_config_superio(void)
-{
+	RestorePCI16Simple(sb, addr, 0x80)
+
+	sb.WriteString(`
 }
 
 /* FIXME: Put proper SPD map here. */
@@ -394,7 +382,7 @@
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	// the lid is open by default.
+	/* The lid is open by default. */
 	gnvs->lids = 1;
 
 	gnvs->tcrt = 100;

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