Kevin Chiu uploaded patch set #4 to this change.

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mb/google/zork: update USB 2.0 controller Lane Parameter for berknip

Enhance USB 2.0 C0/C1 A0/A1 SI by increasing the level of
"HS DC Voltage Level" and " Disconnect Threshold Adjustment" registers.
COMPDISTUNE0: 0x3->0x7
TXVREFTUNE0: 0x6->0xf

BUG=b:166398726
BRANCH=zork
TEST=1. emerge-zork coreboot
     2. check U2 register is set correctly.

Change-Id: I69d942605c6d43ece0d71f67df3a5e00b998219b
Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com>
---
M src/mainboard/google/zork/variants/berknip/overridetree.cb
1 file changed, 48 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/46545/4

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