11 comments:
drop "is"
set up the decoding of extended
BIOS region in DMI
GPMR configuration can be used for any decoding. One use case is decoding of extended BIOS region.
Patch Set #1, Line 15: It can ensure that the PCR base address is configured
Actually, it is SoC's responsibility to ensure that.
3
File src/soc/intel/common/block/dmi/dmi.c:
Comment says 3? For now I think it is fine to put these definitions here. But for a future platform we should evaluate if this is SoC specific or can be used across SoCs. Same with macros below.
#define DMI_PCR_GPMR_BASE_SHIFT 16
#define DMI_PCR_GPMR_LIMIT_MASK 0xffff0000
#define DMI_PCR_GPMR_BASE_MASK 0xffff
#define DMI_PCR_GPMR_EN BIT(31)
Typically fields within a register are defined below it and with a single space before the name.
i.e.
#define GPMR_OFFSET(x) (0x277c + (x)*8)
#define DMI_PCR_GPMR_LIMIT_MASK 0xffff0000
#define DMI_PCR_GPMR_BASE_SHIFT 16
#define DMI_PCR_GPMR_BASE_MASK 0xffff
#define GPMR_DID_OFFSET(x) (0x2780 + (x)*8)
#define DMI_PCR_GPMR_EN BIT(31)
Patch Set #1, Line 29: uint32_t
"int" since in the failed case you are returning -1.
Chekc if gpmr_num is not -1.
if (gpmr_num == -1)
return;
This is not correct. You will have to calculate limit.
uint32_t limit = base + size - 1;
if (base & ~(DMI_PCR_GPMR_BASE_MASK << DMI_PCR_GPMR_BASE_SHIFT)) {
printk(BIOS_ERR, "base is not 64-KiB aligned!\n");
return CB_ERR;
}
if (limit & ~DMI_PCR_GPMR_LIMIT_MASK) {
printk(BIOS_ERR, "limit does not end on a 64-KiB boundary!\n");
return CB_ERR;
}
gpmr_write32(GPMR_OFFSET(gpmr_num), (limit & DMI_PCR_GPMR_LIMIT_MASK) |
((base >> DMI_PCR_GPMR_BASE_SHIFT) & DMI_PCR_GPMR_BASE_MASK));
File src/soc/intel/common/block/include/intelblocks/dmi.h:
Patch Set #1, Line 9: * Takes base, size and destination ID and configures the GPMR
trailing whitespace
Needs to be fixed.
Probably should return enum cb_err to indicate if the GPMR was enabled.
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