Marshall Dawson has uploaded this change for review.

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soc/amd/picasso: Add controls for SMT and downcoring

BUG=b:159198385
TEST=confirm both using Mandolin

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I91654817608ab62e4104959b8876333911b90175
---
M src/soc/amd/picasso/chip.h
M src/soc/amd/picasso/romstage.c
2 files changed, 13 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/43299/1

diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h
index 1dbe3d9..54e18af 100644
--- a/src/soc/amd/picasso/chip.h
+++ b/src/soc/amd/picasso/chip.h
@@ -38,6 +38,13 @@
 	uint8_t	tx_res_tune;
 };
 
+enum downcore_modes {
+	DOWNCORE_AUTO = 0,
+	DOWNCORE_1 = 1, /* Run with single core */
+	DOWNCORE_2 = 3, /* Run with two cores */
+	DOWNCORE_3 = 4, /* Run with three cores */
+};
+
 struct soc_amd_picasso_config {
 	struct soc_amd_common_config common_config;
 	/*
@@ -91,6 +98,9 @@
 	/* PROCHOT_L de-assertion Ramp Time */
 	uint32_t prochot_l_deassertion_ramp_time;
 
+	uint8_t downcore_mode;
+	uint8_t smt_disable;
+
 	/* Lower die temperature limit */
 	uint32_t thermctl_limit;
 
diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c
index 7d086fe..6acee50 100644
--- a/src/soc/amd/picasso/romstage.c
+++ b/src/soc/amd/picasso/romstage.c
@@ -51,6 +51,9 @@
 		mcfg->stapm_time_constant = config->stapm_time_constant;
 	}
 
+	mcfg->ccx_down_core_mode = config->downcore_mode;
+	mcfg->ccx_disable_smt = config->smt_disable;
+
 	mcfg->sustained_power_limit = config->sustained_power_limit;
 	mcfg->prochot_l_deassertion_ramp_time = config->prochot_l_deassertion_ramp_time;
 	mcfg->thermctl_limit = config->thermctl_limit;

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