Tristan Hsieh has uploaded this change for review.

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mediatek/mt8183: Add DDR driver of memory test part

BUG=b:80501386
BRANCH=none
TEST=Boots correctly on Kukui, and inits DRAM successfully with related
patches.

Change-Id: I30d5fbd3db2acf36e3058ba4f34558b981fba78c
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
---
M src/soc/mediatek/mt8183/Kconfig
M src/soc/mediatek/mt8183/Makefile.inc
M src/soc/mediatek/mt8183/memory.c
3 files changed, 40 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/28845/1
diff --git a/src/soc/mediatek/mt8183/Kconfig b/src/soc/mediatek/mt8183/Kconfig
index b58be7f..51c6df3 100644
--- a/src/soc/mediatek/mt8183/Kconfig
+++ b/src/soc/mediatek/mt8183/Kconfig
@@ -19,4 +19,14 @@
select VBOOT_STARTS_IN_BOOTBLOCK
select VBOOT_SEPARATE_VERSTAGE

+config DEBUG_DRAM
+ bool "Output verbose DRAM related debug messages"
+ default n
+ help
+ This option enables additional DRAM related debug messages.
+
+config MEMORY_TEST
+ bool
+ default y
+
endif
diff --git a/src/soc/mediatek/mt8183/Makefile.inc b/src/soc/mediatek/mt8183/Makefile.inc
index ec2a9c0..2c128f9 100644
--- a/src/soc/mediatek/mt8183/Makefile.inc
+++ b/src/soc/mediatek/mt8183/Makefile.inc
@@ -24,6 +24,7 @@
romstage-y += dramc_pi_basic_api.c
romstage-y += dramc_pi_calibration_api.c
romstage-y += memory.c
+romstage-$(CONFIG_MEMORY_TEST) += ../common/memory_test.c
romstage-y += ../common/gpio.c gpio.c
romstage-y += ../common/mmu_operations.c mmu_operations.c
romstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
diff --git a/src/soc/mediatek/mt8183/memory.c b/src/soc/mediatek/mt8183/memory.c
index 643ca6b..a0f698c 100644
--- a/src/soc/mediatek/mt8183/memory.c
+++ b/src/soc/mediatek/mt8183/memory.c
@@ -13,10 +13,39 @@
* GNU General Public License for more details.
*/

+#include <assert.h>
+#include <console/console.h>
+#include <soc/dramc_pi_api.h>
#include <soc/emi.h>
+#include <symbols.h>

void mt_mem_init(const struct sdram_params *params)
{
+ u64 rank_size[RANK_MAX];
+
/* memory calibration */
mt_set_emi(params);
+
+ if (IS_ENABLED(CONFIG_MEMORY_TEST)) {
+ size_t r;
+ u8 *addr = _dram;
+
+ dramc_get_rank_size(&rank_size[0]);
+
+ for (r = RANK_0; r < RANK_MAX; r++) {
+ int i;
+
+ if (rank_size[r] == 0)
+ break;
+
+ i = complex_mem_test(addr, 0x2000);
+
+ printk(BIOS_DEBUG, "[MEM] complex R/W mem test %s : %d\n",
+ (i == 0) ? "pass" : "fail", i);
+
+ ASSERT(i == 0);
+
+ addr += rank_size[r];
+ }
+ }
}

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I30d5fbd3db2acf36e3058ba4f34558b981fba78c
Gerrit-Change-Number: 28845
Gerrit-PatchSet: 1
Gerrit-Owner: Tristan Hsieh <tristan.shieh@mediatek.com>