Tim Wawrzynczak submitted this change.

View Change

Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved YH Lin: Looks good to me, but someone else must approve
mb/intel/adlrvp: Update VBT filenames

These files were just renamed to put `adlrvp` in between `vbt`
and the memory technology type.

Change-Id: Icefbac462d0ec9c660541e9cf44686d6dcf82dfd
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52032
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: YH Lin <yueherngl@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/mainboard/intel/adlrvp/mainboard.c
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mainboard/intel/adlrvp/mainboard.c b/src/mainboard/intel/adlrvp/mainboard.c
index 3946204..0ab80d2 100644
--- a/src/mainboard/intel/adlrvp/mainboard.c
+++ b/src/mainboard/intel/adlrvp/mainboard.c
@@ -46,9 +46,9 @@
switch (sku_id) {
case ADL_P_LP5_1:
case ADL_P_LP5_2:
- return "vbt_lp5.bin";
+ return "vbt_adlrvp_lp5.bin";
case ADL_P_DDR5:
- return "vbt_ddr5.bin";
+ return "vbt_adlrvp_ddr5.bin";
default:
return "vbt.bin";
}

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Icefbac462d0ec9c660541e9cf44686d6dcf82dfd
Gerrit-Change-Number: 52032
Gerrit-PatchSet: 2
Gerrit-Owner: Tim Wawrzynczak <twawrzynczak@chromium.org>
Gerrit-Reviewer: Furquan Shaikh <furquan@google.com>
Gerrit-Reviewer: Spoorthi K <spoorthi.k@intel.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak@chromium.org>
Gerrit-Reviewer: YH Lin <yueherngl@google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: merged