John Zhao uploaded patch set #4 to this change.

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soc/intel/tigerlake: Clear TBT PCIe root ports BME at exit boot service

Vt-d based security platform requires the system firmware to clear bus
master enable(BME) bit for all Thunderbolt PCIe root ports, bridges
and devices at exit boot service. In this state with BME bit cleared,
the PCI root ports would be considered as trusted to not forward any DMA
transaction to download endpoint devices.

BUG=141609884
TEST=built image and booted to kernel successfully.

Change-Id: I9650b9dd4df1f9bee53ae3737b7bf60b2ef8017b
Signed-off-by: John Zhao <john.zhao@intel.com>
---
M src/soc/intel/tigerlake/chip.c
1 file changed, 44 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/40968/4

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I9650b9dd4df1f9bee53ae3737b7bf60b2ef8017b
Gerrit-Change-Number: 40968
Gerrit-PatchSet: 4
Gerrit-Owner: John Zhao <john.zhao@intel.com>
Gerrit-Reviewer: Caveh Jalali <caveh@chromium.org>
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