Arthur Heymans has uploaded this change for review.

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cpu/allwinner: Prepend the BOOT0 header to the bootblock.bin

Instead of prepending the BOOT0 header to the full coreboot.rom to
create a new file called BOOT0, prepend to the bootblock.bin that gets
included in BOOTBLOCK FMAP region.

Change-Id: I974a6aaa1a340c6b26f78b9d038be0f580331831
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/cpu/allwinner/a10/Makefile.inc
1 file changed, 3 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/35401/1
diff --git a/src/cpu/allwinner/a10/Makefile.inc b/src/cpu/allwinner/a10/Makefile.inc
index a6cd4b4..9f5f6ac 100644
--- a/src/cpu/allwinner/a10/Makefile.inc
+++ b/src/cpu/allwinner/a10/Makefile.inc
@@ -25,8 +25,6 @@
romstage-y += uart.c uart_console.c
ramstage-y += uart.c uart_console.c

-real-target: $(obj)/BOOT0
-
get_bootblock_size= \
$(eval bb_s=$(shell $(CBFSTOOL) $(1) print | grep bootblocksize | \
sed 's/[^0-9 ]//g')) \
@@ -46,11 +44,11 @@
# under util/arm_boot_tools/mksunxiboot. The boot ROM will load at most 24KiB of
# data to SRAM. The BOOT0 header takes 32 bytes, so bootblock is limited to
# 24KiB - 32 bytes.
-# TODO: make mksunxiboot take the bootblock size as a parameter
# TODO: print an error if bootblock is too large (maybe place ROMSTAGE at the
# exact offset needed to collide with the bootblock)
# FIXME: A10 loads 24KiB. According to Oliver other chips load a little more
#
-$(obj)/BOOT0: $(obj)/coreboot.rom $(MKSUNXIBOOT)
- @printf " BOOT0 $(subst $(obj)/,,$(^))\n"
+
+$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin $(MKSUNXIBOOT)
+ @printf " Prepending BOOT0 header $(subst $(obj)/,,$(^))\n"
$(MKSUNXIBOOT) $(word 1, $^) $@

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Gerrit-Project: coreboot
Gerrit-Branch: 4.8_branch
Gerrit-Change-Id: I974a6aaa1a340c6b26f78b9d038be0f580331831
Gerrit-Change-Number: 35401
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-MessageType: newchange