1 comment:
File src/soc/intel/common/block/include/intelblocks/pmc_ipc.h:
/*
* Provides an ACPI method in the SSDT to write to the IPC mailbox which is
* defined in the PMC device MMIO address space.
*
* One possible use of this method is to to enable/disable the clock for a
* particular PCIe root port at runtime when the device is in D3 state.
*
* The ACPI method takes 7 arguments:
* IPCW (COMMAND, SUB_ID, SIZE, DATA0, DATA1, DATA2, DATA3)
*
* And can return:
* 0 = success
* 1 = error
* 2 = timeout
*/
void pmc_ipc_acpi_fill_ssdt(void);
/*
* Call the ACPI method to write to the IPC mailbox and enable/disable the
* specified clock pin connected to the specified PCIe root port.
*/
void pmc_ipc_acpi_set_pci_clock(unsigned int pcie_rp, unsigned int clock_pin, bool enable);
not sure why this is in both headers...
Ack
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