Arthur Heymans has uploaded this change for review.
soc/intel/Kconfig: Move MMCONF_BASE_ADDRESS out of a common place
include/device/pci_mmio_cfg.h now has a compile time error if
MMCONF_BASE_ADDRESS is not defined. This requires soc/intel target to
explicitly set this in the SOC dir, instead of potentially using a
possibly wrong common default.
Change-Id: Idcfea1718cc36ae16b491604786c26c6ed320f06
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/soc/intel/apollolake/Kconfig
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/common/block/systemagent/Kconfig
M src/soc/intel/denverton_ns/Kconfig
M src/soc/intel/skylake/Kconfig
5 files changed, 16 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/35884/1
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index a1d3c07..24a4b7a 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -128,6 +128,10 @@
TPM part is conntected on Fast SPI interface, but the LPC MMIO
TPM transactions are decoded and serialized over the SPI interface.
+config MMCONF_BASE_ADDRESS
+ hex
+ default 0xe0000000
+
config PCR_BASE_ADDRESS
hex
default 0xd0000000
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index c1fda95..aeef75c 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -109,6 +109,10 @@
select FSP_T_XIP if FSP_CAR
select HECI_DISABLE_USING_SMM if !SOC_INTEL_COFFEELAKE && !SOC_INTEL_WHISKEYLAKE && !SOC_INTEL_COMETLAKE
+config MMCONF_BASE_ADDRESS
+ hex
+ default 0xe0000000
+
config DCACHE_RAM_BASE
default 0xfef00000
diff --git a/src/soc/intel/common/block/systemagent/Kconfig b/src/soc/intel/common/block/systemagent/Kconfig
index 1222573..d7619a0 100644
--- a/src/soc/intel/common/block/systemagent/Kconfig
+++ b/src/soc/intel/common/block/systemagent/Kconfig
@@ -3,10 +3,6 @@
help
Intel Processor common System Agent support
-config MMCONF_BASE_ADDRESS
- hex
- default 0xe0000000
-
config SA_PCIEX_LENGTH
hex
default 0x10000000 if (PCIEX_LENGTH_256MB)
diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig
index 2aadcae..d12e4e3 100644
--- a/src/soc/intel/denverton_ns/Kconfig
+++ b/src/soc/intel/denverton_ns/Kconfig
@@ -91,6 +91,10 @@
int
default 16
+config MMCONF_BASE_ADDRESS
+ hex
+ default 0xe0000000
+
config PCR_BASE_ADDRESS
hex
default 0xfd000000
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 901e5f9..a9b8aaa 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -120,6 +120,10 @@
hex
default 0x200000
+config MMCONF_BASE_ADDRESS
+ hex
+ default 0xe0000000
+
config DCACHE_RAM_BASE
hex
default 0xfef00000
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