Attention is currently required from: Paul Menzel.
24 comments:
File src/mainboard/asus/a88xm-e/mainboard.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 28: {IOMMU_DEVFN, {PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D} }, /* IOMMU: 0:00.02 - IRQ 3 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 29: {GFX_DEVFN, {PIRQ_A, PIRQ_NC, PIRQ_NC, PIRQ_NC} }, /* APU Integrated Graphics: 0:01.00 - IRQ 3 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 30: {ACTL_DEVFN, {PIRQ_NC, PIRQ_B, PIRQ_NC, PIRQ_NC} }, /* APU HDMI Audio Controller: 0:01.01 - IRQ 4 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 31: {NB_PCIE_PORT1_DEVFN, {PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D} }, /* PCIe GPP to dGPU 1:00.00: 0:02.00 - IRQ 3 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 32: {NB_PCIE_PORT3_DEVFN, {PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D} }, /* PCIe GPP to 2:00.00: 0:04.00 - IRQ 3 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 33: {NB_PCIE_PORT4_DEVFN, {PIRQ_B, PIRQ_C, PIRQ_D, PIRQ_A} }, /* PCIe GPP to 3:00.00: 0:05.00 - IRQ 4 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 34: {NB_PCIE_PORT5_DEVFN, {PIRQ_B, PIRQ_C, PIRQ_D, PIRQ_A} }, /* PCIe GPP to Eth 4:00.00: 0:06.00 - IRQ 4 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 35: {XHCI_DEVFN, {PIRQ_C, PIRQ_NC, PIRQ_NC, PIRQ_NC} }, /* USB XHCI: 0:10.00 - IRQ 5 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 36: {SATA_DEVFN, {PIRQ_SATA, PIRQ_NC, PIRQ_NC, PIRQ_NC} }, /* SATA: 0:11.00 - IRQ 7 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 37: {OHCI1_DEVFN, {PIRQ_OHCI1, PIRQ_NC, PIRQ_NC, PIRQ_NC} }, /* USB OHCI1: 0:12.00 - IRQ 5 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 38: {EHCI1_DEVFN, {PIRQ_NC, PIRQ_EHCI1, PIRQ_NC, PIRQ_NC} }, /* USB EHCI1: 0:12.02 - IRQ 4 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 39: {OHCI2_DEVFN, {PIRQ_OHCI2, PIRQ_NC, PIRQ_NC, PIRQ_NC} }, /* USB OHCI2: 0:13.00 - IRQ 5 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 40: {EHCI2_DEVFN, {PIRQ_NC, PIRQ_EHCI2, PIRQ_NC, PIRQ_NC} }, /* USB EHCI2: 0:13.02 - IRQ 4 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 41: {OHCI3_DEVFN, {PIRQ_OHCI3, PIRQ_NC, PIRQ_NC, PIRQ_NC} }, /* USB OHCI3: 0:16.00 - IRQ 5 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 42: {EHCI3_DEVFN, {PIRQ_NC, PIRQ_EHCI3, PIRQ_NC, PIRQ_NC} }, /* USB EHCI3: 0:16.02 - IRQ 4 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 43: {HDA_DEVFN, {PIRQ_HDA, PIRQ_NC, PIRQ_NC, PIRQ_NC} }, /* Southbridge HD Audio: 0:14.02 - IRQ 3 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 44: {SB_PCI_PORT_DEVFN, {PIRQ_E, PIRQ_F, PIRQ_NC, PIRQ_NC} }, /* Southbridge PCI Port: 0:14.04 - IRQ 11 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 45: {OHCI4_DEVFN, {PIRQ_NC, PIRQ_NC, PIRQ_OHCI4, PIRQ_NC} }, /* USB OHCI4: 0:14.05 - IRQ 5 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 46: {SB_PCIE_PORT1_DEVFN, {PIRQ_B, PIRQ_C, PIRQ_D, PIRQ_A} }, /* Southbridge PCIe Port 1: 0:15.00 - IRQ 4 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 47: {SB_PCIE_PORT2_DEVFN, {PIRQ_C, PIRQ_D, PIRQ_A, PIRQ_B} }, /* Southbridge PCIe Port 2: 0:15.01 - IRQ 5 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 48: {SB_PCIE_PORT3_DEVFN, {PIRQ_D, PIRQ_A, PIRQ_B, PIRQ_C} }, /* Southbridge PCIe Port 3: 0:15.02 - IRQ 7 */
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 49: {SB_PCIE_PORT4_DEVFN, {PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D} } /* Southbridge PCIe Port 4: 0:15.03 - IRQ 3 */
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File src/mainboard/asus/a88xm-e/mptable.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 132: smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), ioapic_id, (pin))
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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-117709):
Patch Set #3, Line 231: smp_write_lintsrc(mc, (type), MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa, (intr), (apicid), (pin))
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