Aamir Bohra has uploaded this change for review.

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mb/google/volteer: Update variant specific GPIOs for boldar

boldar has EC_IN_RW mapped to GPP_A8 which differs from baseboard
configuration. Hence boldar gpio cannot use the baseboard defined gpio
mappings as is. Update the variant specific GPIO mapping for boldar and
remove direct include of baseboard gpio.h owing to configuration deltas.

Change-Id: Iba20b1636a155f4bf4bd9a50a015c9b73809cec3
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
---
M src/mainboard/google/volteer/variants/boldar/include/variant/gpio.h
1 file changed, 20 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/46828/1

diff --git a/src/mainboard/google/volteer/variants/boldar/include/variant/gpio.h b/src/mainboard/google/volteer/variants/boldar/include/variant/gpio.h
index c4fe342..789c90a8 100644
--- a/src/mainboard/google/volteer/variants/boldar/include/variant/gpio.h
+++ b/src/mainboard/google/volteer/variants/boldar/include/variant/gpio.h
@@ -3,6 +3,25 @@
 #ifndef VARIANT_GPIO_H
 #define VARIANT_GPIO_H
 
-#include <baseboard/gpio.h>
+#include <soc/gpe.h>
+#include <soc/gpio.h>
+
+/* EC in RW */
+#define GPIO_EC_IN_RW		GPP_A8
+
+/* BIOS Flash Write Protect */
+#define GPIO_PCH_WP		GPP_B11
+
+/* EC wake is LAN_WAKE# */
+#define GPE_EC_WAKE		GPE0_LAN_WAK
+
+/* EC sync IRQ */
+#define EC_SYNC_IRQ		GPP_C6_IRQ
+
+/* eSPI virtual wire reporting */
+#define EC_SCI_GPI		GPE0_ESPI
+
+/* DRAM population strap (value 0=fully-populated, 1=half-populated) */
+#define GPIO_MEM_CH_SEL		GPP_A17
 
 #endif

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