Arthur Heymans submitted this change.

View Change

Approvals: build bot (Jenkins): Verified Kyösti Mälkki: Looks good to me, approved Patrick Rudolph: Looks good to me, approved Angel Pons: Looks good to me, approved
cpu/intel/model_2065x/bootblock: Remove dead code

This codepath is never takes as it checks if the CPU is at least
ivybridge.

Change-Id: Id064385f0c8bb0b094714129df6d8ba36c87a307
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35810
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
---
M src/cpu/intel/model_2065x/bootblock.c
1 file changed, 0 insertions(+), 52 deletions(-)

diff --git a/src/cpu/intel/model_2065x/bootblock.c b/src/cpu/intel/model_2065x/bootblock.c
index 273c193..399f5e0 100644
--- a/src/cpu/intel/model_2065x/bootblock.c
+++ b/src/cpu/intel/model_2065x/bootblock.c
@@ -57,60 +57,8 @@
wrmsr(MTRR_DEF_TYPE_MSR, msr);
}

-static void set_flex_ratio_to_tdp_nominal(void)
-{
- msr_t flex_ratio, msr;
- u32 soft_reset;
- u8 nominal_ratio;
-
- /* Minimum CPU revision for configurable TDP support */
- if (cpuid_eax(1) < IVB_CONFIG_TDP_MIN_CPUID)
- return;
-
- /* Check for Flex Ratio support */
- flex_ratio = rdmsr(MSR_FLEX_RATIO);
- if (!(flex_ratio.lo & FLEX_RATIO_EN))
- return;
-
- /* Check for >0 configurable TDPs */
- msr = rdmsr(MSR_PLATFORM_INFO);
- if (((msr.hi >> 1) & 3) == 0)
- return;
-
- /* Use nominal TDP ratio for flex ratio */
- msr = rdmsr(MSR_CONFIG_TDP_NOMINAL);
- nominal_ratio = msr.lo & 0xff;
-
- /* See if flex ratio is already set to nominal TDP ratio */
- if (((flex_ratio.lo >> 8) & 0xff) == nominal_ratio)
- return;
-
- /* Set flex ratio to nominal TDP ratio */
- flex_ratio.lo &= ~0xff00;
- flex_ratio.lo |= nominal_ratio << 8;
- flex_ratio.lo |= FLEX_RATIO_LOCK;
- wrmsr(MSR_FLEX_RATIO, flex_ratio);
-
- /* Set flex ratio in soft reset data register bits 11:6.
- * RCBA region is enabled in southbridge bootblock */
- soft_reset = RCBA32(SOFT_RESET_DATA);
- soft_reset &= ~(0x3f << 6);
- soft_reset |= (nominal_ratio & 0x3f) << 6;
- RCBA32(SOFT_RESET_DATA) = soft_reset;
-
- /* Set soft reset control to use register value */
- RCBA32_OR(SOFT_RESET_CTRL, 1);
-
- /* Issue warm reset, will be "CPU only" due to soft reset data */
- outb(0x0, 0xcf9);
- outb(0x6, 0xcf9);
- halt();
-}
-
static void bootblock_cpu_init(void)
{
- /* Set flex ratio and reset if needed */
- set_flex_ratio_to_tdp_nominal();
enable_rom_caching();
intel_update_microcode_from_cbfs();
}

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Id064385f0c8bb0b094714129df6d8ba36c87a307
Gerrit-Change-Number: 35810
Gerrit-PatchSet: 2
Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki@gmail.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: merged