Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31617 )
Change subject: superio/ite/it8613e: add support for ITE IT8613E ......................................................................
Patch Set 8:
(1 comment)
https://review.coreboot.org/#/c/31617/4/src/superio/ite/it8613e/superio.c File src/superio/ite/it8613e/superio.c:
https://review.coreboot.org/#/c/31617/4/src/superio/ite/it8613e/superio.c@74 PS4, Line 74: 0x0fff
I've rechecked it, those are correct according to specification. […]
I checked the IT8772E datasheet and there the simple I/O BAR is 8 bytes long: "The accessed I/O ports are programmable and are eight consecutive I/O ports (Base Address+0, Base Address+1, Base Address+2, Base Address+3, Base Address+4, Base Address+5). Base Address is programmed on the registers of GPIO Simple I/O Base Address LSB and MSB registers (LDN=07h, Index=62h and 63h)." This is however not mentioned in the table with the sizes of the different I/O BARs of the SIO.