Craig Hesling has uploaded this change for review.
hatch/mushu: Fix FPMCU pwr/rst gpio handling
This simply makes these variants consistent with other
hatch variants.
This follows https://review.coreboot.org/c/coreboot/+/37459 .
BUG=b/148457345
TEST=None
Change-Id: I12dc0c3bead7672e2d3207771212efb0d246973a
Signed-off-by: Craig Hesling <hesling@chromium.org>
---
M src/mainboard/google/hatch/variants/hatch/Makefile.inc
M src/mainboard/google/hatch/variants/hatch/gpio.c
A src/mainboard/google/hatch/variants/hatch/ramstage.c
M src/mainboard/google/hatch/variants/mushu/Makefile.inc
M src/mainboard/google/hatch/variants/mushu/gpio.c
A src/mainboard/google/hatch/variants/mushu/ramstage.c
6 files changed, 70 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/38623/1
diff --git a/src/mainboard/google/hatch/variants/hatch/Makefile.inc b/src/mainboard/google/hatch/variants/hatch/Makefile.inc
index a990b5a..4bf640a 100644
--- a/src/mainboard/google/hatch/variants/hatch/Makefile.inc
+++ b/src/mainboard/google/hatch/variants/hatch/Makefile.inc
@@ -19,5 +19,7 @@
SPD_SOURCES += 16G_2400 # 0b100
SPD_SOURCES += 16G_2666 # 0b101
-ramstage-y += gpio.c
bootblock-y += gpio.c
+
+ramstage-y += gpio.c
+ramstage-y += ramstage.c
diff --git a/src/mainboard/google/hatch/variants/hatch/gpio.c b/src/mainboard/google/hatch/variants/hatch/gpio.c
index 862b28f..2c4fa50 100644
--- a/src/mainboard/google/hatch/variants/hatch/gpio.c
+++ b/src/mainboard/google/hatch/variants/hatch/gpio.c
@@ -55,8 +55,6 @@
* needed in this table.
*/
static const struct pad_config early_gpio_table[] = {
- /* A12 : FPMCU_RST_ODL */
- PAD_CFG_GPO(GPP_A12, 0, DEEP),
/* B15 : H1_SLAVE_SPI_CS_L */
PAD_CFG_NF(GPP_B15, NONE, DEEP, NF1),
/* B16 : H1_SLAVE_SPI_CLK */
diff --git a/src/mainboard/google/hatch/variants/hatch/ramstage.c b/src/mainboard/google/hatch/variants/hatch/ramstage.c
new file mode 100644
index 0000000..8e84308
--- /dev/null
+++ b/src/mainboard/google/hatch/variants/hatch/ramstage.c
@@ -0,0 +1,32 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2020 Google LLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <delay.h>
+#include <gpio.h>
+#include <baseboard/variants.h>
+#include <soc/gpio.h>
+
+void variant_ramstage_init(void)
+{
+ /*
+ * Enable power to FPMCU, wait for power rail to stabilize,
+ * and then deassert FPMCU reset.
+ * Waiting for the power rail to stabilize can take a while,
+ * a minimum of 400us on Kohaku.
+ */
+ gpio_output(GPP_C11, 1);
+ mdelay(1);
+ gpio_output(GPP_A12, 1);
+}
diff --git a/src/mainboard/google/hatch/variants/mushu/Makefile.inc b/src/mainboard/google/hatch/variants/mushu/Makefile.inc
index a990b5a..4bf640a 100644
--- a/src/mainboard/google/hatch/variants/mushu/Makefile.inc
+++ b/src/mainboard/google/hatch/variants/mushu/Makefile.inc
@@ -19,5 +19,7 @@
SPD_SOURCES += 16G_2400 # 0b100
SPD_SOURCES += 16G_2666 # 0b101
-ramstage-y += gpio.c
bootblock-y += gpio.c
+
+ramstage-y += gpio.c
+ramstage-y += ramstage.c
diff --git a/src/mainboard/google/hatch/variants/mushu/gpio.c b/src/mainboard/google/hatch/variants/mushu/gpio.c
index 09e1594..1453cab 100644
--- a/src/mainboard/google/hatch/variants/mushu/gpio.c
+++ b/src/mainboard/google/hatch/variants/mushu/gpio.c
@@ -57,8 +57,6 @@
* needed in this table.
*/
static const struct pad_config early_gpio_table[] = {
- /* A12 : FPMCU_RST_ODL */
- PAD_CFG_GPO(GPP_A12, 0, DEEP),
/* B15 : H1_SLAVE_SPI_CS_L */
PAD_CFG_NF(GPP_B15, NONE, DEEP, NF1),
/* B16 : H1_SLAVE_SPI_CLK */
diff --git a/src/mainboard/google/hatch/variants/mushu/ramstage.c b/src/mainboard/google/hatch/variants/mushu/ramstage.c
new file mode 100644
index 0000000..8e84308
--- /dev/null
+++ b/src/mainboard/google/hatch/variants/mushu/ramstage.c
@@ -0,0 +1,32 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2020 Google LLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <delay.h>
+#include <gpio.h>
+#include <baseboard/variants.h>
+#include <soc/gpio.h>
+
+void variant_ramstage_init(void)
+{
+ /*
+ * Enable power to FPMCU, wait for power rail to stabilize,
+ * and then deassert FPMCU reset.
+ * Waiting for the power rail to stabilize can take a while,
+ * a minimum of 400us on Kohaku.
+ */
+ gpio_output(GPP_C11, 1);
+ mdelay(1);
+ gpio_output(GPP_A12, 1);
+}
To view, visit change 38623. To unsubscribe, or for help writing mail filters, visit settings.