Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35985 )
Change subject: intel/skylake: Implement PCIe RP devicetree update based on DID
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Patch Set 11:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35985/11/src/soc/intel/skylake/chip...
File src/soc/intel/skylake/chip_fsp20.c:
https://review.coreboot.org/c/coreboot/+/35985/11/src/soc/intel/skylake/chip...
PS11, Line 51: case PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP1: /* Fall through. */
I feel like we're being too slick here. […]
Oh... was nearly through implementing the array idea, then realized that
it brings us back to one of the original problems: we'd have to know in
advance which PCH we have. But it should still be doable with a more
explicit mapping (i.e. no implicit index == function number). I'll test
how it looks like.
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