Tristan Corrick has uploaded this change for review.

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sb/intel/lynxpoint: Ensure the finalise handler is called

The finalise handler is not called during S3 resume when using the
`BS_PAYLOAD_BOOT` approach. So, adopt the `lpc_final` approach used by
bd82x6x and others.

Tested on an ASRock H81M-HDS. The finalise handler is now called on
the normal boot path, and during S3 resume.

Change-Id: I9766a8dcbcb38420e937c810d252fef071851e92
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
---
M src/southbridge/intel/lynxpoint/lpc.c
M src/southbridge/intel/lynxpoint/smi.c
2 files changed, 8 insertions(+), 14 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/29976/1

diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index ca850c0..fe5bce8 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -967,6 +967,13 @@
 	return current;
 }
 
+static void lpc_final(struct device *dev)
+{
+	if (IS_ENABLED(CONFIG_HAVE_SMI_HANDLER) && (acpi_is_wakeup_s3() ||
+	    IS_ENABLED(CONFIG_INTEL_CHIPSET_LOCKDOWN))) {
+		outb(APM_CNT_FINALIZE, APM_CNT);
+	}
+}
 
 static struct pci_operations pci_ops = {
 	.set_subsystem = set_subsystem,
@@ -981,6 +988,7 @@
 	.acpi_name		= lpc_acpi_name,
 	.write_acpi_tables      = southbridge_write_acpi_tables,
 	.init			= lpc_init,
+	.final			= lpc_final,
 	.enable			= pch_lpc_enable,
 	.scan_bus		= scan_lpc_bus,
 	.ops_pci		= &pci_ops,
diff --git a/src/southbridge/intel/lynxpoint/smi.c b/src/southbridge/intel/lynxpoint/smi.c
index 5dab05c..cf70d21 100644
--- a/src/southbridge/intel/lynxpoint/smi.c
+++ b/src/southbridge/intel/lynxpoint/smi.c
@@ -118,17 +118,3 @@
 		  "d" (APM_CNT)
 	);
 }
-
-/*
- * Finalize system before payload boot if INTEL_CHIPSET_LOCKDOWN=y
- */
-#if IS_ENABLED(CONFIG_INTEL_CHIPSET_LOCKDOWN)
-
-static void finalize_boot(void *unused)
-{
-	outb(APM_CNT_FINALIZE, APM_CNT);
-}
-
-BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, finalize_boot, NULL);
-
-#endif

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