Attention is currently required from: Michał Kopeć.
Michał Żygowski has uploaded this change for review.
mb/msi/ms7d25,ms7e06: Enable discrete TPM module support
Now that multiple TPM drivers may be compiled in, it is possible to
support switching between fTPM and dTPM.
The patch adds:
- Device tree entry for PC80 discrete TPM
- TPM PIRQ# GPIO active low routed to IOAPIC for TPM interrupt
- MEMORY_MAPPED_TPM option to board's Kconfig to enable PC80 TPM driver
When the ME is disabled, e.g. via HECI command, chipset will route the
TPM traffic to SPI automatically. When a SPI TPM is connected to the
JTPM1 on the board, it will be probed successfully and initialized
in place of inactive PTT/fTPM.
Change-Id: Ie6e7026b6f1cec842bce4ef40b6db7feb75200e3
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
---
M src/mainboard/msi/ms7d25/Kconfig
M src/mainboard/msi/ms7d25/devicetree.cb
M src/mainboard/msi/ms7d25/gpio.h
M src/mainboard/msi/ms7e06/Kconfig
M src/mainboard/msi/ms7e06/devicetree.cb
M src/mainboard/msi/ms7e06/gpio.h
6 files changed, 18 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/80456/1
diff --git a/src/mainboard/msi/ms7d25/Kconfig b/src/mainboard/msi/ms7d25/Kconfig
index 653d915..e91a1eb 100644
--- a/src/mainboard/msi/ms7d25/Kconfig
+++ b/src/mainboard/msi/ms7d25/Kconfig
@@ -14,6 +14,7 @@
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select INTEL_GMA_HAVE_VBT
+ select MEMORY_MAPPED_TPM
select CRB_TPM
select HAVE_INTEL_PTT
select USE_LEGACY_8254_TIMER
@@ -54,6 +55,9 @@
hex
default 0x1000000
+config TPM_PIRQ
+ default 0x3f # GPP_E7_IRQ
+
config VBOOT
select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
select GBB_FLAG_DISABLE_FWMP
diff --git a/src/mainboard/msi/ms7d25/devicetree.cb b/src/mainboard/msi/ms7d25/devicetree.cb
index f0c8d2d..d7d83cd 100644
--- a/src/mainboard/msi/ms7d25/devicetree.cb
+++ b/src/mainboard/msi/ms7d25/devicetree.cb
@@ -241,6 +241,9 @@
device pnp 4e.e off end # TACH/PWM assignment
device pnp 4e.f off end # Function register
end
+ chip drivers/pc80/tpm
+ device pnp 0.0 on end # TPM
+ end
end
device ref p2sb on end
device ref hda on
diff --git a/src/mainboard/msi/ms7d25/gpio.h b/src/mainboard/msi/ms7d25/gpio.h
index 62625c0..ee5164e 100644
--- a/src/mainboard/msi/ms7d25/gpio.h
+++ b/src/mainboard/msi/ms7d25/gpio.h
@@ -537,8 +537,8 @@
PAD_CFG_GPI_TRIG_OWN(GPP_E5, NONE, PLTRST, OFF, ACPI),
/* GPP_E6 - GPIO */
PAD_CFG_GPI_TRIG_OWN(GPP_E6, NONE, PLTRST, OFF, ACPI),
- /* GPP_E7 - GPIO */
- PAD_CFG_GPI_TRIG_OWN(GPP_E7, NONE, PLTRST, OFF, ACPI),
+ /* GPP_E7 - TPM_PIRQ# */
+ PAD_CFG_GPI_APIC_LOW(GPP_E7, NONE, PLTRST),
/* GPP_E8 - SATALED# */
PAD_CFG_NF(GPP_E8, NONE, PLTRST, NF1),
/* GPP_E9 - USB_OC0# */
diff --git a/src/mainboard/msi/ms7e06/Kconfig b/src/mainboard/msi/ms7e06/Kconfig
index d248582..6ea0aec 100644
--- a/src/mainboard/msi/ms7e06/Kconfig
+++ b/src/mainboard/msi/ms7e06/Kconfig
@@ -14,6 +14,7 @@
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select INTEL_GMA_HAVE_VBT
+ select MEMORY_MAPPED_TPM
select CRB_TPM
select HAVE_INTEL_PTT
@@ -47,6 +48,9 @@
config CBFS_SIZE
default 0x1000000
+config TPM_PIRQ
+ default 0x3f # GPP_E7_IRQ
+
config VBOOT
select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
select GBB_FLAG_DISABLE_FWMP
diff --git a/src/mainboard/msi/ms7e06/devicetree.cb b/src/mainboard/msi/ms7e06/devicetree.cb
index 65ba314..cfe6b50 100644
--- a/src/mainboard/msi/ms7e06/devicetree.cb
+++ b/src/mainboard/msi/ms7e06/devicetree.cb
@@ -231,6 +231,9 @@
device pnp 4e.e off end # TACH/PWM assignment
device pnp 4e.f off end # Function register
end
+ chip drivers/pc80/tpm
+ device pnp 0.0 on end # TPM
+ end
end
device ref hda on
subsystemid 0x1462 0x9e06
diff --git a/src/mainboard/msi/ms7e06/gpio.h b/src/mainboard/msi/ms7e06/gpio.h
index bf61dcb..c137bf3 100644
--- a/src/mainboard/msi/ms7e06/gpio.h
+++ b/src/mainboard/msi/ms7e06/gpio.h
@@ -537,8 +537,8 @@
PAD_CFG_GPI_TRIG_OWN(GPP_E5, NONE, PLTRST, OFF, ACPI),
/* GPP_E6 - GPIO */
PAD_CFG_GPI_TRIG_OWN(GPP_E6, NONE, PLTRST, OFF, ACPI),
- /* GPP_E7 - GPIO */
- PAD_CFG_GPI_TRIG_OWN(GPP_E7, NONE, PLTRST, OFF, ACPI),
+ /* GPP_E7 - TPM_PIRQ# */
+ PAD_CFG_GPI_APIC_LOW(GPP_E7, NONE, PLTRST),
/* GPP_E8 - SATALED# */
PAD_CFG_NF(GPP_E8, NONE, PLTRST, NF1),
/* GPP_E9 - USB_OC0# */
To view, visit change 80456. To unsubscribe, or for help writing mail filters, visit settings.