Patch Set 6:

Patch Set 6:

Patch Set 6:

Patch Set 6:

@Gaggery any new results?

It stuck at bootblock_pch_early_init -> gspi_early_bar_init -> gspi_get_cfg -> config_of_soc -> config_of -> pcidev_on_root -> pcidev_path_on_root -> pci_path_behind -> find_dev_path -> path_eq. It's an interesting location where it was stuck. Need some more time to debug. Welcome for suggestion. I tried to disable PBE timer by directly writing 0x1 to MSR 0x139 but it was hung at wrmsr.

gspi_early_bar_init is not called from bootblock_pch_early_init but from bootblock_soc_init, while bootblock_pch_early_init is called from bootblock_soc_early_init.

I assume you are looking at skylake/ while Gaggery tested on a newer platform.

Ouch. Indeed, sorry for the noise...

> In both cases that'd mean that CAR is not reached

I don't follow, you are both referring to C functions. Those run after
CAR setup.

I meant FSP-M not CAR :S

I'm not sure why it was stuck at https://github.com/coreboot/coreboot/blob/master/src/device/device_const.c#L99

Use DCI to with Intel System debugger to check, the address of path2 is 0xb which doesn't make sense. I'm not sure if something wrong in CAR which may lead to this result.

I wonder if the machine hangs because of a timing issue. I'd try adding some delays to see if the hang happens on a different place.

Hmm.. I disabled PBE Timer by changing the setting in BPM. Enabled BOOTBLOCK_DEBUG_SPINLOOP to wait for DCI connection and ran single step. I think the hang should not be from timing issue since that SPINLOOP already introduces lots of delay but it still hung at the same location.

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