Attention is currently required from: Tim Wawrzynczak.

Tim Wawrzynczak uploaded patch set #6 to this change.

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soc/intel/alderlake: Add PCIe root port wake sources to elog

Log PCIe root port wake events in the elog.

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I2867b1fa12f639cd6c49a58f698b51b089e2b483
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M src/soc/intel/alderlake/elog.c
1 file changed, 40 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/47398/6

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