Patrick Rudolph has uploaded this change for review.

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mb/ibm/sbp1: Enable 2 PCI segments

Untested.

Change-Id: Ifd2f8b920d9901cbb8ee2fe7a2911af98ce8e20f
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
M src/mainboard/ibm/sbp1/Kconfig
M src/mainboard/ibm/sbp1/romstage.c
2 files changed, 5 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/79879/1

diff --git a/src/mainboard/ibm/sbp1/Kconfig b/src/mainboard/ibm/sbp1/Kconfig
index 8d8b62e..6a5bc64 100644
--- a/src/mainboard/ibm/sbp1/Kconfig
+++ b/src/mainboard/ibm/sbp1/Kconfig
@@ -31,4 +31,7 @@
 	int
 	default 480
 
+config ECAM_SEGMENT_COUNT
+	default 2
+
 endif
diff --git a/src/mainboard/ibm/sbp1/romstage.c b/src/mainboard/ibm/sbp1/romstage.c
index f5b081b..5f1e374 100644
--- a/src/mainboard/ibm/sbp1/romstage.c
+++ b/src/mainboard/ibm/sbp1/romstage.c
@@ -282,8 +282,8 @@
 	/* Set FSP debug message to Disable */
 	mupd->FspmConfig.serialDebugMsgLvl = 0x0;
 
-	/* Force 256MiB MMCONF (Segment0) only */
-	mupd->FspmConfig.mmCfgSize = 0x2;
+	/* Force 512MiB MMCONF (Segment0 + Segment1) */
+	mupd->FspmConfig.mmCfgSize = 0x3;
 	mupd->FspmConfig.PcieHotPlugEnable = 1;
 
 	/*

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