Felix Held has uploaded this change for review.

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soc/amd/picasso/reset: remove leftover PCI includes

On Stoneyridge some PCI registers were accessed, but on Picasso this is
no longer the case.

Change-Id: Ifbf65f9724a14d4847af98930759c865453775b4
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
---
M src/soc/amd/picasso/reset.c
1 file changed, 0 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/48486/1

diff --git a/src/soc/amd/picasso/reset.c b/src/soc/amd/picasso/reset.c
index 7a0074c..dea166a 100644
--- a/src/soc/amd/picasso/reset.c
+++ b/src/soc/amd/picasso/reset.c
@@ -3,9 +3,7 @@
 #include <arch/io.h>
 #include <console/console.h>
 #include <reset.h>
-#include <soc/pci_devs.h>
 #include <soc/reset.h>
-#include <device/pci_ops.h>
 #include <soc/southbridge.h>
 #include <amdblocks/acpimmio.h>
 #include <amdblocks/reset.h>

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