Jonathan Neuschäfer (j.neuschaefer@gmx.net) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15285
-gerrit
commit 4a6231dc60f9c37b66da567f25ff22f7ad658ff0 Author: Jonathan Neuschäfer j.neuschaefer@gmx.net Date: Thu Jun 30 22:58:53 2016 +0200
spike-riscv: Look for the CBFS in RAM
Change-Id: I98927a70adc45d9aca916bd985932b94287921de Signed-off-by: Jonathan Neuschäfer j.neuschaefer@gmx.net --- src/arch/riscv/Makefile.inc | 3 --- src/arch/riscv/rom_media.c | 26 -------------------- src/mainboard/emulation/qemu-riscv/Makefile.inc | 3 +++ src/mainboard/emulation/qemu-riscv/rom_media.c | 26 ++++++++++++++++++++ src/mainboard/emulation/spike-riscv/Makefile.inc | 3 +++ src/mainboard/emulation/spike-riscv/rom_media.c | 30 ++++++++++++++++++++++++ 6 files changed, 62 insertions(+), 29 deletions(-)
diff --git a/src/arch/riscv/Makefile.inc b/src/arch/riscv/Makefile.inc index 243fa53..c1c62ef 100644 --- a/src/arch/riscv/Makefile.inc +++ b/src/arch/riscv/Makefile.inc @@ -33,7 +33,6 @@ bootblock-y += trap_util.S bootblock-y += trap_handler.c bootblock-y += virtual_memory.c bootblock-y += boot.c -bootblock-y += rom_media.c bootblock-y += misc.c bootblock-y += \ $(top)/src/lib/memchr.c \ @@ -60,7 +59,6 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_RISCV),y)
romstage-y += boot.c romstage-y += stages.c -romstage-y += rom_media.c romstage-y += misc.c romstage-y += \ $(top)/src/lib/memchr.c \ @@ -90,7 +88,6 @@ ifeq ($(CONFIG_ARCH_RAMSTAGE_RISCV),y) ramstage-y = ramstage-y += trap_handler.c ramstage-y += virtual_memory.c -ramstage-y += rom_media.c ramstage-y += stages.c ramstage-y += misc.c ramstage-y += boot.c diff --git a/src/arch/riscv/rom_media.c b/src/arch/riscv/rom_media.c deleted file mode 100644 index c171307..0000000 --- a/src/arch/riscv/rom_media.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2015 Google Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#include <boot_device.h> - -/* This assumes that the CBFS resides at 0x0, which is true for the default - * configuration. */ -static const struct mem_region_device boot_dev = - MEM_REGION_DEV_RO_INIT(NULL, CONFIG_ROM_SIZE); - -const struct region_device *boot_device_ro(void) -{ - return &boot_dev.rdev; -} diff --git a/src/mainboard/emulation/qemu-riscv/Makefile.inc b/src/mainboard/emulation/qemu-riscv/Makefile.inc index 87bc39a..b8a62f7 100644 --- a/src/mainboard/emulation/qemu-riscv/Makefile.inc +++ b/src/mainboard/emulation/qemu-riscv/Makefile.inc @@ -15,11 +15,14 @@ bootblock-y += bootblock.c bootblock-y += uart.c bootblock-y += qemu_util.c +bootblock-y += rom_media.c romstage-y += romstage.c romstage-y += qemu_util.c romstage-y += uart.c +romstage-y += rom_media.c ramstage-y += uart.c ramstage-y += qemu_util.c +ramstage-y += rom_media.c
bootblock-y += memlayout.ld romstage-y += memlayout.ld diff --git a/src/mainboard/emulation/qemu-riscv/rom_media.c b/src/mainboard/emulation/qemu-riscv/rom_media.c new file mode 100644 index 0000000..c171307 --- /dev/null +++ b/src/mainboard/emulation/qemu-riscv/rom_media.c @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include <boot_device.h> + +/* This assumes that the CBFS resides at 0x0, which is true for the default + * configuration. */ +static const struct mem_region_device boot_dev = + MEM_REGION_DEV_RO_INIT(NULL, CONFIG_ROM_SIZE); + +const struct region_device *boot_device_ro(void) +{ + return &boot_dev.rdev; +} diff --git a/src/mainboard/emulation/spike-riscv/Makefile.inc b/src/mainboard/emulation/spike-riscv/Makefile.inc index dff4758..91c1369 100644 --- a/src/mainboard/emulation/spike-riscv/Makefile.inc +++ b/src/mainboard/emulation/spike-riscv/Makefile.inc @@ -15,11 +15,14 @@ bootblock-y += bootblock.c bootblock-y += uart.c bootblock-y += spike_util.c +bootblock-y += rom_media.c romstage-y += romstage.c romstage-y += uart.c romstage-y += spike_util.c +romstage-y += rom_media.c ramstage-y += uart.c ramstage-y += spike_util.c +ramstage-y += rom_media.c
bootblock-y += memlayout.ld romstage-y += memlayout.ld diff --git a/src/mainboard/emulation/spike-riscv/rom_media.c b/src/mainboard/emulation/spike-riscv/rom_media.c new file mode 100644 index 0000000..10952a3 --- /dev/null +++ b/src/mainboard/emulation/spike-riscv/rom_media.c @@ -0,0 +1,30 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * Copyright 2016 Jonathan Neuschäfer j.neuschaefer@gmx.net + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include <boot_device.h> + +/* + * 0x80000000 is this start of RAM. We currently need to load coreboot.rom into + * RAM on SPIKE, because SPIKE doesn't support loading custom code into the + * boot ROM. + */ +static const struct mem_region_device boot_dev = + MEM_REGION_DEV_RO_INIT(0x80000000, CONFIG_ROM_SIZE); + +const struct region_device *boot_device_ro(void) +{ + return &boot_dev.rdev; +}