Frans Hendriks has uploaded this change for review.
src/soc/intel/braswell/acpi/lpss.asl: Remove SPI1 and PWM asl code
Linux remains using SPI1 and PWM ASL even if these devices are disabled.
SPI1 and PWM are disabled by standard Intel FSP. Remove ASL code when standard Intel FSP is used.
BUG=N/A
TEST=Intel CherryHill CRB
Change-Id: Iec2ca7520081d00bf7a53d58ee054aa6f23e5606
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
---
M src/soc/intel/braswell/Kconfig
M src/soc/intel/braswell/acpi/lpss.asl
2 files changed, 17 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/29417/1
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index 2ba7992..4723682 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -127,4 +127,16 @@
string
default "soc/intel/braswell/bootblock/timestamp.inc"
+config ENABLE_SPI1_ASL
+ bool "Include ASL code for SPI1 device"
+ default y
+ help
+ Enable this if the SPI1 are supported
+ This device is disabled in Intel FSP.
+config ENABLE_PWM_ASL
+ bool "Include ASL code for PWM devices"
+ default y
+ help
+ Enable this if the PWM interfaces are supported
+ This device is disabled in Intel FSP.
endif
diff --git a/src/soc/intel/braswell/acpi/lpss.asl b/src/soc/intel/braswell/acpi/lpss.asl
index 4cc93cc..19ff1e9 100644
--- a/src/soc/intel/braswell/acpi/lpss.asl
+++ b/src/soc/intel/braswell/acpi/lpss.asl
@@ -2,6 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2013 Google Inc.
+ * Copyright (C) 2018 Eltan B.V.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@@ -522,6 +523,7 @@
}
}
+#if IS_ENABLED(CONFIG_ENABLE_SPI1_ASL)
Device (SPI1)
{
Name (_HID, "8086228E")
@@ -574,7 +576,9 @@
Or (PSAT, 0x00000000, PSAT)
}
}
+#endif
+#if IS_ENABLED(CONFIG_ENABLE_PWM_ASL)
Device (PWM1)
{
Name (_HID, "80862288")
@@ -630,6 +634,7 @@
}
}
}
+#endif
Device (UAR1)
{
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