Johnny Lin has uploaded this change for review.
drivers/ocp/ewl: Set CMOS flag to enforce MRC when there's EWL type3 error
If Fastboot is enabled, the next boot will skip MRC and won't be able
to detect MRC error via EWL and still continues booting. Set a CMOS flag
to enforce FSP MRC training in the next boot.
Reference CPX change https://review.coreboot.org/c/coreboot/+/51230
Change-Id: I9dee0472f8e2602cecf88c6d00dec0bf02b9f7bd
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
---
M src/drivers/ocp/ewl/ewl.c
1 file changed, 36 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/69148/1
diff --git a/src/drivers/ocp/ewl/ewl.c b/src/drivers/ocp/ewl/ewl.c
index 5448c30..8e4648e 100644
--- a/src/drivers/ocp/ewl/ewl.c
+++ b/src/drivers/ocp/ewl/ewl.c
@@ -1,10 +1,25 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
+#include <pc80/mc146818rtc.h>
#include <soc/soc_util.h>
+#include <stdbool.h>
#include <lib.h>
#include <drivers/ipmi/ocp/ipmi_ocp.h>
#include "ocp_ewl.h"
+#define CMOS_OFFSET_MRC_STATUS 0x47
+
+static void set_cmos_mrc_cold_boot_flag(bool cold_boot_required)
+{
+ uint8_t mrc_status = cmos_read(CMOS_OFFSET_MRC_STATUS);
+ uint8_t new_mrc_status = (mrc_status & 0xfe) | cold_boot_required;
+ printk(BIOS_SPEW, "MRC status: 0x%02x want 0x%02x\n", mrc_status, new_mrc_status);
+ if (new_mrc_status != mrc_status) {
+ printk(BIOS_DEBUG, "Set CMOS MRC cold boot flag.\n");
+ cmos_write(new_mrc_status, CMOS_OFFSET_MRC_STATUS);
+ }
+}
+
static void ipmi_send_sel_ewl_type3_err(EWL_ENTRY_HEADER *header,
EWL_ENTRY_MEMORY_LOCATION memory_location)
{
@@ -81,6 +96,11 @@
}
offset += warning_header->Size;
}
- if (type3_flag)
+ if (type3_flag) {
+ /* If Fastboot is enabled, the next boot will skip MRC and won't detect
+ MRC error via EWL and still can boot up, so set cmos flag to enforce
+ MRC as a workaround. */
+ set_cmos_mrc_cold_boot_flag(true);
die("Memory Training Error!\n");
+ }
}
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