[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: Add required FSP UPD changes for CML

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31284 )

Change subject: soc/intel/cannonlake: Add required FSP UPD changes for CML
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Patch Set 13: Code-Review+1

(4 comments)

some minor nits.

https://review.coreboot.org/#/c/31284/13/src/soc/intel/cannonlake/fsp_params... 
File src/soc/intel/cannonlake/fsp_params.c:

https://review.coreboot.org/#/c/31284/13/src/soc/intel/cannonlake/fsp_params... 
PS13, Line 28: SerialIoDev
just use serial_io_dev

https://review.coreboot.org/#/c/31284/13/src/soc/intel/cannonlake/fsp_params... 
PS13, Line 59: for (i = 0; i < CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX; i++, dev_offset++) {
line greater than 80?

https://review.coreboot.org/#/c/31284/13/src/soc/intel/cannonlake/fsp_params... 
PS13, Line 65: params->SerialIoSpiMode[i] = config->SerialIoDevMode[dev_offset];
line greater than 80?

https://review.coreboot.org/#/c/31284/13/src/soc/intel/cannonlake/fsp_params... 
PS13, Line 74: params->SerialIoUartMode[i] = config->SerialIoDevMode[dev_offset];
line greater than 80?