Shaunak Saha (shaunak.saha@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16299
-gerrit
commit 61675facdd32cb0b56a7d1a0f95e2bc21da7f6df Author: Shaunak Saha shaunak.saha@intel.com Date: Mon Aug 22 22:05:35 2016 -0700
intel/common: Clear wake status bits before sleep
Call power management utility function clear_wake_sts from southbridge_smi_sleep before going to sleep. This is needed to clear the wake status bits in ACPI registers GPE0.
BUG=chrome-os-partner:55583 BRANCH=None TEST=Verified that system goes to sleep on lidclose and powerd_dbus_suspend command issued from built-in keyboard.
Change-Id: I204a59f8a19137d6a192ea2d89939eefcd5d41ce Signed-off-by: Shaunak Saha shaunak.saha@intel.com --- src/soc/intel/common/smihandler.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/soc/intel/common/smihandler.c b/src/soc/intel/common/smihandler.c index e27752b..95e7c76 100644 --- a/src/soc/intel/common/smihandler.c +++ b/src/soc/intel/common/smihandler.c @@ -176,7 +176,9 @@ void southbridge_smi_sleep(const struct smm_save_state_ops *save_state_ops) printk(BIOS_DEBUG, "SMI#: ERROR: SLP_TYP reserved\n"); break; } - /* Clear pending wake status bit to avoid immediate wake */ + + /* Clear the gpio gpe0 status bits in ACPI registers */ + clear_gpi_gpe_sts();
/* Tri-state specific GPIOS to avoid leakage during S3/S5 */