Kyösti Mälkki has uploaded this change for review.
cpu/intel/common: Use common tsc_freq_mhz()
Change-Id: I0e7159039751a88d86b6c343be5f085e6e15570a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
---
M src/cpu/intel/common/fsb.c
M src/cpu/intel/haswell/Makefile.inc
D src/cpu/intel/haswell/tsc_freq.c
M src/cpu/intel/model_2065x/Makefile.inc
D src/cpu/intel/model_2065x/tsc_freq.c
M src/cpu/intel/model_206ax/Makefile.inc
D src/cpu/intel/model_206ax/tsc_freq.c
7 files changed, 12 insertions(+), 90 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/31342/1
diff --git a/src/cpu/intel/common/fsb.c b/src/cpu/intel/common/fsb.c
index d06739c..f53baa0 100644
--- a/src/cpu/intel/common/fsb.c
+++ b/src/cpu/intel/common/fsb.c
@@ -13,6 +13,7 @@
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
+#include <cpu/x86/tsc.h>
#include <cpu/intel/speedstep.h>
#include <cpu/intel/fsb.h>
#include <console/console.h>
@@ -105,3 +106,14 @@
printk(BIOS_ERR, "FSB not supported or not found\n");
return -1;
}
+
+unsigned long tsc_freq_mhz(void)
+{
+ int ret, fsb, ratio;
+
+ ret = get_fsb_tsc(&fsb, &ratio);
+ if (ret < 0)
+ die("TSC frequency not known\n");
+
+ return 100 * DIV_ROUND_CLOSEST(ratio * fsb, 100);
+}
diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc
index c317c09..87da59b 100644
--- a/src/cpu/intel/haswell/Makefile.inc
+++ b/src/cpu/intel/haswell/Makefile.inc
@@ -1,7 +1,5 @@
ramstage-y += haswell_init.c
-ramstage-y += tsc_freq.c
romstage-y += romstage.c
-romstage-y += tsc_freq.c
romstage-y += ../car/romstage.c
ramstage-y += acpi.c
@@ -12,7 +10,6 @@
postcar-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
-smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c
ifneq ($(CONFIG_TSC_MONOTONIC_TIMER),y)
ramstage-y += monotonic_timer.c
diff --git a/src/cpu/intel/haswell/tsc_freq.c b/src/cpu/intel/haswell/tsc_freq.c
deleted file mode 100644
index b05cae5..0000000
--- a/src/cpu/intel/haswell/tsc_freq.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013 Google, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <stdint.h>
-#include <cpu/x86/msr.h>
-#include <cpu/x86/tsc.h>
-#include "cpu/intel/haswell/haswell.h"
-
-unsigned long tsc_freq_mhz(void)
-{
- msr_t platform_info;
-
- platform_info = rdmsr(MSR_PLATFORM_INFO);
- return HASWELL_BCLK * ((platform_info.lo >> 8) & 0xff);
-}
diff --git a/src/cpu/intel/model_2065x/Makefile.inc b/src/cpu/intel/model_2065x/Makefile.inc
index ec8643a..b8e474d 100644
--- a/src/cpu/intel/model_2065x/Makefile.inc
+++ b/src/cpu/intel/model_2065x/Makefile.inc
@@ -10,9 +10,6 @@
subdirs-y += ../smm/gen1
subdirs-y += ../common
-ramstage-y += tsc_freq.c
-romstage-y += tsc_freq.c
-smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c
ramstage-y += acpi.c
diff --git a/src/cpu/intel/model_2065x/tsc_freq.c b/src/cpu/intel/model_2065x/tsc_freq.c
deleted file mode 100644
index 041785b..0000000
--- a/src/cpu/intel/model_2065x/tsc_freq.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013 Google, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <stdint.h>
-#include <cpu/x86/msr.h>
-#include <cpu/x86/tsc.h>
-#include "model_2065x.h"
-
-unsigned long tsc_freq_mhz(void)
-{
- msr_t platform_info;
-
- platform_info = rdmsr(MSR_PLATFORM_INFO);
- return NEHALEM_BCLK * ((platform_info.lo >> 8) & 0xff);
-}
diff --git a/src/cpu/intel/model_206ax/Makefile.inc b/src/cpu/intel/model_206ax/Makefile.inc
index d193e60..6339ba0 100644
--- a/src/cpu/intel/model_206ax/Makefile.inc
+++ b/src/cpu/intel/model_206ax/Makefile.inc
@@ -17,9 +17,6 @@
romstage-y += common.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += common.c
-ramstage-y += tsc_freq.c
-romstage-y += tsc_freq.c
-smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
diff --git a/src/cpu/intel/model_206ax/tsc_freq.c b/src/cpu/intel/model_206ax/tsc_freq.c
deleted file mode 100644
index 545ca5f..0000000
--- a/src/cpu/intel/model_206ax/tsc_freq.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013 Google, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <stdint.h>
-#include <cpu/x86/msr.h>
-#include <cpu/x86/tsc.h>
-#include "model_206ax.h"
-
-unsigned long tsc_freq_mhz(void)
-{
- msr_t platform_info;
-
- platform_info = rdmsr(MSR_PLATFORM_INFO);
- return SANDYBRIDGE_BCLK * ((platform_info.lo >> 8) & 0xff);
-}
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