WANG Siyuan (wangsiyuanbuaa@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9944
-gerrit
commit 3a5b36d14b685f6ed9e1b2169a3febde7cae40bc Author: WANG Siyuan wangsiyuanbuaa@gmail.com Date: Wed Apr 22 15:22:00 2015 +0800
Build system: Fix "dd: invalid number `0x800000'"
dd doesn't recognise hex number. the commit introducing this: f21b657 build system: improve portability by not relying on extraordinary dd options
Change-Id: Ie0df3eb00fa2ba5d7bbb8218e24b864cbdd07c3a Signed-off-by: WANG Siyuan SiYuan.Wang@amd.com Signed-off-by: WANG Siyuan wangsiyuanbuaa@gmail.com --- Makefile.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Makefile.inc b/Makefile.inc index 04e8085..b67f145 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -560,7 +560,7 @@ $(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/ramstage.elf $(CBFSTOOL) $(c @printf " CBFS $(subst $(obj)/,,$(@))\n" # The full ROM may be larger than the CBFS part, so create an empty # file (filled with \377 = 0xff) and copy the CBFS image over it. - dd if=/dev/zero bs=$(CONFIG_ROM_SIZE) count=1 | tr '\000' '\377' > $@.tmp + dd if=/dev/zero bs=$(call _toint,$(CONFIG_ROM_SIZE)) count=1 2> /dev/null | tr '\000' '\377' > $@.tmp dd if=$(obj)/coreboot.pre of=$@.tmp bs=8192 conv=notrunc 2> /dev/null $(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/ramstage.elf -n $(CONFIG_CBFS_PREFIX)/ramstage -c $(CBFS_COMPRESS_FLAG) ifeq ($(CONFIG_PAYLOAD_NONE),y)