Attention is currently required from: Patrick Rudolph.

Tim Wawrzynczak has uploaded this change for review.

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soc/intel/alderlake: Define soc_get_pcie_rp_type

In order to distinguish PCH from CPU PCIe RPs, define the
soc_get_pcie_rp_type function for alderlake.

BUG=b:197983574

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I7438513e10b7cea8dac678b97a901b710247c188
---
M src/soc/intel/alderlake/pcie_rp.c
1 file changed, 34 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/59854/1

diff --git a/src/soc/intel/alderlake/pcie_rp.c b/src/soc/intel/alderlake/pcie_rp.c
index 4ec24c2..b2e9e6c 100644
--- a/src/soc/intel/alderlake/pcie_rp.c
+++ b/src/soc/intel/alderlake/pcie_rp.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <device/device.h>
 #include <intelblocks/pcie_rp.h>
 #include <soc/pci_devs.h>
 #include <soc/pcie.h>
@@ -32,3 +33,36 @@
 {
 	return cpu_rp_groups;
 }
+
+static bool is_part_of_group(const struct device *dev,
+			     const struct pcie_rp_group *groups)
+{
+	if (dev->path.type != DEVICE_PATH_PCI)
+		return false;
+
+	const unsigned int slot_to_find = PCI_SLOT(dev->path.pci.devfn);
+	const unsigned int fn_to_find = PCI_FUNC(dev->path.pci.devfn);
+	const struct pcie_rp_group *group;
+	unsigned int i;
+	unsigned int fn;
+
+	for (group = groups; group->count; ++group) {
+		for (i = 0, fn = rp_start_fn(group); i < group->count; i++, fn++) {
+			if (slot_to_find == group->slot && fn_to_find == fn)
+				return true;
+		}
+	}
+
+	return false;
+}
+
+enum pcie_rp_type soc_get_pcie_rp_type(const struct device *dev)
+{
+	if (is_part_of_group(dev, pch_lp_rp_groups))
+		return PCIE_RP_PCH;
+
+	if (is_part_of_group(dev, cpu_rp_groups))
+		return PCIE_RP_CPU;
+
+	return PCIE_RP_UNKNOWN;
+}

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